[PATCH 16/37] drm/amd/powerplay: init smu tables for rn
Alex Deucher
alexdeucher at gmail.com
Wed Aug 21 22:23:38 UTC 2019
From: Aaron Liu <aaron.liu at amd.com>
Initialize smu tables for renoir:
WATERMARKS/DPMCLOCKS/SMU_METRICS
Signed-off-by: Aaron Liu <aaron.liu at amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng at amd.com>
Reviewed-by: Evan Quan <evan.quan at amd.com>
Reviewed-by: Kevin Wang <kevin1.wang at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 16 +++++++++++
drivers/gpu/drm/amd/powerplay/smu_v12_0.c | 32 ++++++++++++++++++++++
2 files changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index 7c3dc150eaa3..c8e0d79de43e 100644
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -138,14 +138,30 @@ static int renoir_get_smu_table_index(struct smu_context *smc, uint32_t index)
return mapping.map_to;
}
+static int renoir_tables_init(struct smu_context *smu, struct smu_table *tables)
+{
+ SMU_TABLE_INIT(tables, SMU_TABLE_WATERMARKS, sizeof(Watermarks_t),
+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
+ SMU_TABLE_INIT(tables, SMU_TABLE_DPMCLOCKS, sizeof(DpmClocks_t),
+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
+ SMU_TABLE_INIT(tables, SMU_TABLE_SMU_METRICS, sizeof(SmuMetrics_t),
+ PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
+
+ return 0;
+}
+
static const struct pptable_funcs renoir_ppt_funcs = {
.get_smu_msg_index = renoir_get_smu_msg_index,
.get_smu_table_index = renoir_get_smu_table_index,
+ .tables_init = renoir_tables_init,
.set_power_state = NULL,
};
void renoir_set_ppt_funcs(struct smu_context *smu)
{
+ struct smu_table_context *smu_table = &smu->smu_table;
+
smu->ppt_funcs = &renoir_ppt_funcs;
smu->smc_if_version = SMU12_DRIVER_IF_VERSION;
+ smu_table->table_count = TABLE_COUNT;
}
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
index 363a5a76b6a6..76a6c4b7b63c 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
@@ -270,6 +270,36 @@ static int smu_v12_0_gfx_off_control(struct smu_context *smu, bool enable)
return ret;
}
+static int smu_v12_0_init_smc_tables(struct smu_context *smu)
+{
+ struct smu_table_context *smu_table = &smu->smu_table;
+ struct smu_table *tables = NULL;
+
+ if (smu_table->tables || smu_table->table_count == 0)
+ return -EINVAL;
+
+ tables = kcalloc(SMU_TABLE_COUNT, sizeof(struct smu_table),
+ GFP_KERNEL);
+ if (!tables)
+ return -ENOMEM;
+
+ smu_table->tables = tables;
+
+ return smu_tables_init(smu, tables);
+}
+
+static int smu_v12_0_fini_smc_tables(struct smu_context *smu)
+{
+ struct smu_table_context *smu_table = &smu->smu_table;
+
+ if (!smu_table->tables || smu_table->table_count == 0)
+ return -EINVAL;
+
+ kfree(smu_table->tables);
+ smu_table->tables = NULL;
+
+ return 0;
+}
static const struct smu_funcs smu_v12_0_funcs = {
.check_fw_status = smu_v12_0_check_fw_status,
.check_fw_version = smu_v12_0_check_fw_version,
@@ -280,6 +310,8 @@ static const struct smu_funcs smu_v12_0_funcs = {
.read_smc_arg = smu_v12_0_read_arg,
.set_gfx_cgpg = smu_v12_0_set_gfx_cgpg,
.gfx_off_control = smu_v12_0_gfx_off_control,
+ .init_smc_tables = smu_v12_0_init_smc_tables,
+ .fini_smc_tables = smu_v12_0_fini_smc_tables,
};
void smu_v12_0_set_smu_funcs(struct smu_context *smu)
--
2.20.1
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