[PATCH 28/37] drm/amdgpu: enable DF clock gating for rn

Alex Deucher alexdeucher at gmail.com
Wed Aug 21 22:23:50 UTC 2019


From: Prike Liang <Prike.Liang at amd.com>

Enable DF clock gating during DF IP early init.

Signed-off-by: Prike Liang <Prike.Liang at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/soc15.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 0552942ee732..6ab444d6be72 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -1171,7 +1171,8 @@ static int soc15_common_early_init(void *handle)
 				 AMD_CG_SUPPORT_VCN_MGCG |
 				 AMD_CG_SUPPORT_IH_CG |
 				 AMD_CG_SUPPORT_ATHUB_LS |
-				 AMD_CG_SUPPORT_ATHUB_MGCG;
+				 AMD_CG_SUPPORT_ATHUB_MGCG |
+				 AMD_CG_SUPPORT_DF_MGCG;
 		adev->pg_flags = 0;
 		adev->external_rev_id = adev->rev_id + 0x91;
 
-- 
2.20.1



More information about the amd-gfx mailing list