[PATCH 7/8] drm/amdgpu: enable/disable ras_controller_irq and err_event_athub_irq

[Zhang, Hawking]

Thanks. Let me find a more reasonable place to do bif_ecc_late_init. The code is dramatically changed since the first time I worked out the series.

Regards,
Hawking

-----Original Message-----
From: Zhou1, Tao <Tao.Zhou1 at amd.com> 
Sent: 2019年8月26日 14:05
To: Zhang, Hawking <Hawking.Zhang at amd.com>; amd-gfx at lists.freedesktop.org; Deucher, Alexander <Alexander.Deucher at amd.com>
Cc: Zhang, Hawking <Hawking.Zhang at amd.com>
Subject: RE: [PATCH 7/8] drm/amdgpu: enable/disable ras_controller_irq and err_event_athub_irq



> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of 
> Hawking Zhang
> Sent: 2019年8月26日 11:55
> To: amd-gfx at lists.freedesktop.org; Deucher, Alexander 
> <Alexander.Deucher at amd.com>
> Cc: Zhang, Hawking <Hawking.Zhang at amd.com>
> Subject: [PATCH 7/8] drm/amdgpu: enable/disable ras_controller_irq and 
> err_event_athub_irq
> 
[Tao] need a commit description

> Signed-off-by: Hawking Zhang <Hawking.Zhang at amd.com>
> Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index 55da6f5..8b4a568 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -822,6 +822,18 @@ static int gmc_v9_0_ecc_ras_block_late_init(void
> *handle,
>  			goto irq;
>  	}
> 
> +	if (adev->nbio.funcs->init_ras_controller_interrupt) {
> +		r = amdgpu_irq_get(adev, &adev->nbio.ras_controller_irq, 0);
> +		if (r)
> +			goto irq;
> +	}
> +
> +	if (adev->nbio.funcs->init_ras_err_event_athub_interrupt) {
> +		r = amdgpu_irq_get(adev, &adev-
> >nbio.ras_err_event_athub_irq, 0);
> +		if (r)
> +			goto irq;
> +	}
[Tao] Both umc and mmhub ras init will call it, I think it's better to put these two irq_get in the path of umc block.

> +
>  	return 0;
>  irq:
>  	amdgpu_ras_sysfs_remove(adev, *ras_if); @@ -1427,6 +1439,10 @@ 
> static int gmc_v9_0_hw_fini(void *handle)
> 
>  	amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0);
>  	amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0);
> +	if (adev->nbio.funcs->init_ras_controller_interrupt)
> +		amdgpu_irq_put(adev, &adev->nbio.ras_controller_irq, 0);
> +	if (adev->nbio.funcs->init_ras_err_event_athub_interrupt)
> +		amdgpu_irq_put(adev, &adev-
> >nbio.ras_err_event_athub_irq, 0);
>  	gmc_v9_0_gart_disable(adev);
> 
>  	return 0;
> --
> 2.7.4
> 
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