[PATCH 7/7] drm/amdgpu: switch to amdgpu_ras_late_init for nbio v7_4 (v2)

Zhou1, Tao Tao.Zhou1 at amd.com
Fri Aug 30 02:39:20 UTC 2019


With the two points in patch #1 and patch #5 are fixed, the series is:

Reviewed-by: Tao Zhou <tao.zhou1 at amd.com>

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of
> Hawking Zhang
> Sent: 2019年8月29日 21:31
> To: amd-gfx at lists.freedesktop.org; Deucher, Alexander
> <Alexander.Deucher at amd.com>; Zhou1, Tao <Tao.Zhou1 at amd.com>; Chen,
> Guchun <Guchun.Chen at amd.com>
> Cc: Zhang, Hawking <Hawking.Zhang at amd.com>
> Subject: [PATCH 7/7] drm/amdgpu: switch to amdgpu_ras_late_init for nbio
> v7_4 (v2)
> 
> call helper function in late init phase to handle ras init for nbio ip block
> 
> v2: init local var r to 0 in case the function return failure on asics that don't
> have ras_late_init implementation
> 
> Signed-off-by: Hawking Zhang <Hawking.Zhang at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/soc15.c | 13 ++++++++++++-
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
> b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index e791ac3..c6ff225c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -1208,11 +1208,15 @@ static int soc15_common_early_init(void
> *handle)  static int soc15_common_late_init(void *handle)  {
>  	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> +	int r = 0;
> 
>  	if (amdgpu_sriov_vf(adev))
>  		xgpu_ai_mailbox_get_irq(adev);
> 
> -	return 0;
> +	if (adev->nbio.funcs->ras_late_init)
> +		r = adev->nbio.funcs->ras_late_init(adev);
> +
> +	return r;
>  }
> 
>  static int soc15_common_sw_init(void *handle) @@ -1289,6 +1293,13 @@
> static int soc15_common_hw_fini(void *handle)
>  	if (amdgpu_sriov_vf(adev))
>  		xgpu_ai_mailbox_put_irq(adev);
> 
> +	if (amdgpu_ras_is_supported(adev, adev->nbio.ras_if->block)) {
> +		if (adev->nbio.funcs->init_ras_controller_interrupt)
> +			amdgpu_irq_put(adev, &adev-
> >nbio.ras_controller_irq, 0);
> +		if (adev->nbio.funcs->init_ras_err_event_athub_interrupt)
> +			amdgpu_irq_put(adev, &adev-
> >nbio.ras_err_event_athub_irq, 0);
> +	}
> +
>  	return 0;
>  }
> 
> --
> 2.7.4
> 
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