[PATCH v2] drm/amd/display: Loading NV10/14 Bounding Box Data Directly from Code

[Wu, Hersen]

[AMD Official Use Only - Internal Distribution Only]


Reviewed-by: hersen wu < hersenxs.wu at amd.com>

-----Original Message-----
From: Liu, Zhan <Zhan.Liu at amd.com> 
Sent: Tuesday, December 3, 2019 12:49 PM
To: amd-gfx at lists.freedesktop.org; Wu, Hersen <hersenxs.wu at amd.com>; Kazlauskas, Nicholas <Nicholas.Kazlauskas at amd.com>
Cc: Liu, Zhan <Zhan.Liu at amd.com>
Subject: [PATCH v2] drm/amd/display: Loading NV10/14 Bounding Box Data Directly from Code

[Why]
NV10/14 has released. Its time to get NV10/14 bounding box directly from code.

[How]
Retrieve NV10/14 bounding box data directly from code.
Retrieve NV12 bounding box data from firmware.

Signed-off-by: Zhan Liu <zhan.liu at amd.com>
---
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 2ccfd84a7da4..2a158ff5f0a5 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -83,8 +83,6 @@
 
 #include "amdgpu_socbb.h"
 
-/* NV12 SOC BB is currently in FW, mark SW bounding box invalid. */ -#define SOC_BOUNDING_BOX_VALID false  #define DC_LOGGER_INIT(logger)
 
 struct _vcs_dpi_ip_params_st dcn2_0_ip = { @@ -3271,12 +3269,13 @@ static bool init_soc_bounding_box(struct dc *dc,
 
 	DC_LOGGER_INIT(dc->ctx->logger);
 
-	if (!bb && !SOC_BOUNDING_BOX_VALID) {
+	/* TODO: upstream NV12 bounding box when its launched */
+	if (!bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
 		DC_LOG_ERROR("%s: not valid soc bounding box/n", __func__);
 		return false;
 	}
 
-	if (bb && !SOC_BOUNDING_BOX_VALID) {
+	if (bb && ASICREV_IS_NAVI12_P(dc->ctx->asic_id.hw_internal_rev)) {
 		int i;
 
 		dcn2_0_nv12_soc.sr_exit_time_us =
--
2.17.1