[PATCH 2/2] drm/amdgpu: remove memory training p2c buffer reservation(V2)

[Yuan, Xiaojie]

[AMD Official Use Only - Internal Distribution Only]

Reviewed-by: Xiaojie Yuan <xiaojie.yuan at amd.com>

BR,
Xiaojie

________________________________________
From: Tianci Yin <tianci.yin at amd.com>
Sent: Thursday, December 19, 2019 10:44 AM
To: amd-gfx at lists.freedesktop.org
Cc: Tuikov, Luben; Koenig, Christian; Deucher, Alexander; Zhang, Hawking; Xu, Feifei; Yuan, Xiaojie; Long, Gang; Wang, Kevin(Yang); Yin, Tianci (Rico)
Subject: [PATCH 2/2] drm/amdgpu: remove memory training p2c buffer reservation(V2)

From: "Tianci.Yin" <tianci.yin at amd.com>

IP discovery TMR(occupied the top VRAM with size DISCOVERY_TMR_SIZE)
has been reserved, and the p2c buffer is in the range of this TMR, so
the p2c buffer reservation is unnecessary.

Change-Id: Ib1f2f2b4a1f3869c03ffe22e2836cdbee17ba99f
Reviewed-by: Kevin Wang <kevin1.wang at amd.com>
Signed-off-by: Tianci.Yin <tianci.yin at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h |  1 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 21 ++-------------------
 2 files changed, 2 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
index 5f8fd3e3535b..3265487b859f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
@@ -202,7 +202,6 @@ struct psp_memory_training_context {

        /*vram offset of the p2c training data*/
        u64 p2c_train_data_offset;
-       struct amdgpu_bo *p2c_bo;

        /*vram offset of the c2p training data*/
        u64 c2p_train_data_offset;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index ec84acdd43a2..60f17e989014 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1681,9 +1681,6 @@ static int amdgpu_ttm_training_reserve_vram_fini(struct amdgpu_device *adev)
        amdgpu_bo_free_kernel(&ctx->c2p_bo, NULL, NULL);
        ctx->c2p_bo = NULL;

-       amdgpu_bo_free_kernel(&ctx->p2c_bo, NULL, NULL);
-       ctx->p2c_bo = NULL;
-
        return 0;
 }

@@ -1725,17 +1722,6 @@ static int amdgpu_ttm_training_reserve_vram_init(struct amdgpu_device *adev)
                  ctx->p2c_train_data_offset,
                  ctx->c2p_train_data_offset);

-       ret = amdgpu_bo_create_kernel_at(adev,
-                                        ctx->p2c_train_data_offset,
-                                        ctx->train_data_size,
-                                        AMDGPU_GEM_DOMAIN_VRAM,
-                                        &ctx->p2c_bo,
-                                        NULL);
-       if (ret) {
-               DRM_ERROR("alloc p2c_bo failed(%d)!\n", ret);
-               goto Err_out;
-       }
-
        ret = amdgpu_bo_create_kernel_at(adev,
                                         ctx->c2p_train_data_offset,
                                         ctx->train_data_size,
@@ -1744,15 +1730,12 @@ static int amdgpu_ttm_training_reserve_vram_init(struct amdgpu_device *adev)
                                         NULL);
        if (ret) {
                DRM_ERROR("alloc c2p_bo failed(%d)!\n", ret);
-               goto Err_out;
+               amdgpu_ttm_training_reserve_vram_fini(adev);
+               return ret;
        }

        ctx->init = PSP_MEM_TRAIN_RESERVE_SUCCESS;
        return 0;
-
-Err_out:
-       amdgpu_ttm_training_reserve_vram_fini(adev);
-       return ret;
 }

 /**
--
2.17.1