[PATCH 1/2] drm/amdgpu/smu/navi: Adjust default behavior for peak sclk profile
Alex Deucher
alexdeucher at gmail.com
Fri Dec 20 20:13:35 UTC 2019
Fetch the sclk from the pptable if there is no specified sclk for
the board.
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index bf87e93b26fc..c33744a0d46b 100644
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -1587,7 +1587,7 @@ static int navi10_set_peak_clock_by_device(struct smu_context *smu)
struct amdgpu_device *adev = smu->adev;
int ret = 0;
uint32_t sclk_freq = 0, uclk_freq = 0;
- uint32_t uclk_level = 0;
+ uint32_t sclk_level = 0, uclk_level = 0;
switch (adev->asic_type) {
case CHIP_NAVI10:
@@ -1629,7 +1629,13 @@ static int navi10_set_peak_clock_by_device(struct smu_context *smu)
}
break;
default:
- return -EINVAL;
+ ret = smu_get_dpm_level_count(smu, SMU_SCLK, &sclk_level);
+ if (ret)
+ return ret;
+ ret = smu_get_dpm_freq_by_index(smu, SMU_SCLK, sclk_level - 1, &sclk_freq);
+ if (ret)
+ return ret;
+ break;
}
ret = smu_get_dpm_level_count(smu, SMU_UCLK, &uclk_level);
--
2.24.1
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