[PATCH 2/5] drm/amdgpu: Fix a bug in setting CP_MEC_DOORBELL_RANGE_UPPER on SOC15

[Zeng, Oak]

+ Clint/Alice

Hi Clint,

We think CP_MEC_DOORBELL_RANGE_LOWER/UPPER registers are used by MEC to check whether a doorbell routed to MEC belongs to MEC, is this understanding correct? 

From the register spec, those registers are 27 bits. Does this mean MEC use all 27 bits to determine? For example, if we set lower/upper to [0, 4k], will a doorbell ring at 6K address be ignored by MEC?

Thanks,
Oak

-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Zhao, Yong
Sent: Tuesday, February 5, 2019 3:31 PM
To: amd-gfx at lists.freedesktop.org
Cc: Zhao, Yong <Yong.Zhao at amd.com>
Subject: [PATCH 2/5] drm/amdgpu: Fix a bug in setting CP_MEC_DOORBELL_RANGE_UPPER on SOC15

Because CP can use all doorbells outside the ones reserved for SDMA, IH, and VCN, so the value set to CP_MEC_DOORBELL_RANGE_UPPER should be the maximal index possible in a page.

Change-Id: I402a56ce9a80e6c2ed2f96be431ae71ca88e73a4
Signed-off-by: Yong Zhao <Yong.Zhao at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 1 +
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c        | 2 +-
 drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c | 3 +++  drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c | 3 +++
 4 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
index 5c8d04c353d0..90eca63605ea 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h
@@ -73,6 +73,7 @@ struct amdgpu_doorbell_index {
 		} uvd_vce;
 	};
 	uint32_t max_assignment;
+	uint32_t last_idx;
 	/* Per engine SDMA doorbell size in dword */
 	uint32_t dw_range_per_sdma_eng;
 };
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 262ee3cf6f1c..0278e3ab6b94 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2998,7 +2998,7 @@ static int gfx_v9_0_kiq_init_register(struct amdgpu_ring *ring)
 		WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_LOWER,
 					(adev->doorbell_index.kiq * 2) << 2);
 		WREG32_SOC15(GC, 0, mmCP_MEC_DOORBELL_RANGE_UPPER,
-					(adev->doorbell_index.userqueue_end * 2) << 2);
+				(adev->doorbell_index.last_idx * 2) << 2);
 	}
 
 	WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
index d2409df2dde9..9eb8c9209231 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_reg_init.c
@@ -88,5 +88,8 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
 			(adev->doorbell_index.sdma_engine[1]
 			- adev->doorbell_index.sdma_engine[0])
 			* adev->doorbell_index.entry_dw_size;
+
+	adev->doorbell_index.last_idx = PAGE_SIZE
+		/ (sizeof(uint32_t) * adev->doorbell_index.entry_dw_size) - 1;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
index b28c5999d8f0..aa8c7699c689 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega20_reg_init.c
@@ -91,5 +91,8 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
 			(adev->doorbell_index.sdma_engine[1]
 			- adev->doorbell_index.sdma_engine[0])
 			* adev->doorbell_index.entry_dw_size;
+
+	adev->doorbell_index.last_idx = PAGE_SIZE
+		/ (sizeof(uint32_t) * adev->doorbell_index.entry_dw_size) - 1;
 }
 
--
2.17.1

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