[PATCH] drm/amdgpu: Set VM_L2_CNTL.PDE_FAULT_CLASSIFICATION to 0

[Alex Deucher]

yes, go ahead.

Alex

On Tue, Feb 26, 2019 at 6:18 PM Zhao, Yong <Yong.Zhao at amd.com> wrote:
>
> So can I submit it only with the ACKs?
>
> Yong
>
> On 2019-02-26 5:29 a.m., Christian König wrote:
> > Am 26.02.19 um 00:03 schrieb Zhao, Yong:
> >> This is recommended by HW designers. Previously when it was set to 1,
> >> the PDE walk error in VM fault will be treated as
> >> PERMISSION_OR_INVALID_PAGE_FAULT rather than usually expected
> >> OTHER_FAULT.
> >> As a result, the retry control in VM_CONTEXT*_CNTL will change
> >> accordingly.
> >>
> >> The above behavior is kind of abnormal. Furthermore, the
> >> PDE_FAULT_CLASSIFICATION == 1 feature was targeted for very old ASICs
> >> and it never made it way to production. Therefore, we should set it
> >> to 0.
> >>
> >> Signed-off-by: Yong Zhao <Yong.Zhao at amd.com>
> >
> > Acked-by: Christian König <christian.koenig at amd.com>
> >
> >> ---
> >>   drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 +-
> >>   drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 2 +-
> >>   2 files changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> >> b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> >> index f5edddf3b29d..c10ed568ca6c 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> >> @@ -143,7 +143,7 @@ static void gfxhub_v1_0_init_cache_regs(struct
> >> amdgpu_device *adev)
> >>       /* XXX for emulation, Refer to closed source code.*/
> >>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL,
> >> L2_PDE0_CACHE_TAG_GENERATION_MODE,
> >>                   0);
> >> -    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 1);
> >> +    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 0);
> >>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL,
> >> CONTEXT1_IDENTITY_ACCESS_MODE, 1);
> >>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL,
> >> IDENTITY_MODE_FRAGMENT_SIZE, 0);
> >>       WREG32_SOC15(GC, 0, mmVM_L2_CNTL, tmp);
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> >> b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> >> index d0d966d6080a..2a039946a549 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> >> @@ -163,7 +163,7 @@ static void mmhub_v1_0_init_cache_regs(struct
> >> amdgpu_device *adev)
> >>       /* XXX for emulation, Refer to closed source code.*/
> >>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL,
> >> L2_PDE0_CACHE_TAG_GENERATION_MODE,
> >>                   0);
> >> -    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 1);
> >> +    tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, PDE_FAULT_CLASSIFICATION, 0);
> >>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL,
> >> CONTEXT1_IDENTITY_ACCESS_MODE, 1);
> >>       tmp = REG_SET_FIELD(tmp, VM_L2_CNTL,
> >> IDENTITY_MODE_FRAGMENT_SIZE, 0);
> >>       WREG32_SOC15(MMHUB, 0, mmVM_L2_CNTL, tmp);
> >
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