[PATCH] drm/amdgpu: make gfx9 enter into rlc safe mode when set MGCG

[Huang, Ray]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces at lists.freedesktop.org] On Behalf
> Of likun Gao
> Sent: Wednesday, January 02, 2019 4:57 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Gao, Likun <Likun.Gao at amd.com>
> Subject: [PATCH] drm/amdgpu: make gfx9 enter into rlc safe mode when set
> MGCG
> 
> From: Likun Gao <Likun.Gao at amd.com>
> 
> MGCG should RLC enter into safe mode first.
> 
> Signed-off-by: Likun Gao <Likun.Gao at amd.com>

Reviewed-by: Huang Rui <ray.huang at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 7556716..968b127 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3587,6 +3587,8 @@ static void
> gfx_v9_0_update_medium_grain_clock_gating(struct amdgpu_device *adev
> {
>  	uint32_t data, def;
> 
> +	amdgpu_gfx_rlc_enter_safe_mode(adev);
> +
>  	/* It is disabled by HW by default */
>  	if (enable && (adev->cg_flags & AMD_CG_SUPPORT_GFX_MGCG)) {
>  		/* 1 - RLC_CGTT_MGCG_OVERRIDE */
> @@ -3651,6 +3653,8 @@ static void
> gfx_v9_0_update_medium_grain_clock_gating(struct amdgpu_device *adev
>  			WREG32_SOC15(GC, 0, mmCP_MEM_SLP_CNTL,
> data);
>  		}
>  	}
> +
> +	amdgpu_gfx_rlc_exit_safe_mode(adev);
>  }
> 
>  static void gfx_v9_0_update_3d_clock_gating(struct amdgpu_device *adev,
> --
> 2.7.4
> 
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