[PATCH] drm/amdgpu: Setting doorbell range registers earlier

[Deucher, Alexander]

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Zeng, Oak <Oak.Zeng at amd.com>
Sent: Monday, January 14, 2019 5:39:41 PM
To: amd-gfx at lists.freedesktop.org
Cc: Zeng, Oak
Subject: [PATCH] drm/amdgpu: Setting doorbell range registers earlier

HW doorbell writing routing policy: writing to doorbell
not in SDMA/IH/MM/ACV doorbell range will be routed to CP.
So CP doorbell routing depends on doorbell range setting
of above blocks. Setting doorbell range of above blocks
earlier (soc15_common_hw_init) to make sure CP doorbell
writing be routed to CP block.

Change-Id: I3f8edd582fb7cc20a83f48f7a1ff789036b3550e
Signed-off-by: Oak Zeng <Oak.Zeng at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c |  2 --
 drivers/gpu/drm/amd/amdgpu/soc15.c     | 21 +++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/vega10_ih.c |  2 --
 3 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 59638b8..48a166b 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -834,8 +834,6 @@ static void sdma_v4_0_gfx_resume(struct amdgpu_device *adev, unsigned int i)
                                         OFFSET, ring->doorbell_index);
         WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL, doorbell);
         WREG32_SDMA(i, mmSDMA0_GFX_DOORBELL_OFFSET, doorbell_offset);
-       adev->nbio_funcs->sdma_doorbell_range(adev, i, ring->use_doorbell,
-                                             ring->doorbell_index);

         sdma_v4_0_ring_set_wptr(ring);

diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
index 5248b03..4cae547 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
@@ -966,6 +966,21 @@ static int soc15_common_sw_fini(void *handle)
         return 0;
 }

+static void soc15_doorbell_range_init(struct amdgpu_device *adev)
+{
+       int i;
+       struct amdgpu_ring *ring;
+
+       for (i = 0; i < adev->sdma.num_instances; i++) {
+               ring = &adev->sdma.instance[i].ring;
+               adev->nbio_funcs->sdma_doorbell_range(adev, i,
+                       ring->use_doorbell, ring->doorbell_index);
+       }
+
+       adev->nbio_funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell,
+                                               adev->irq.ih.doorbell_index);
+}
+
 static int soc15_common_hw_init(void *handle)
 {
         struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -978,6 +993,12 @@ static int soc15_common_hw_init(void *handle)
         adev->nbio_funcs->init_registers(adev);
         /* enable the doorbell aperture */
         soc15_enable_doorbell_aperture(adev, true);
+       /* HW doorbell routing policy: doorbell writing not
+        * in SDMA/IH/MM/ACV range will be routed to CP. So
+        * we need to init SDMA/IH/MM/ACV doorbell range prior
+        * to CP ip block init and ring test.
+        */
+       soc15_doorbell_range_init(adev);

         return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
index 5627019..877b4a6 100644
--- a/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
+++ b/drivers/gpu/drm/amd/amdgpu/vega10_ih.c
@@ -140,8 +140,6 @@ static int vega10_ih_irq_init(struct amdgpu_device *adev)
                                                  ENABLE, 0);
         }
         WREG32_SOC15(OSSSYS, 0, mmIH_DOORBELL_RPTR, ih_doorbell_rtpr);
-       adev->nbio_funcs->ih_doorbell_range(adev, adev->irq.ih.use_doorbell,
-                                           adev->irq.ih.doorbell_index);

         tmp = RREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL);
         tmp = REG_SET_FIELD(tmp, IH_STORM_CLIENT_LIST_CNTL,
--
2.7.4

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