[PATCH] drm/amdgpu: clean up memory/GDS/GWS/OA alignment code

[Christian König]

Am 22.01.19 um 22:45 schrieb Marek Olšák:
> From: Marek Olšák <marek.olsak at amd.com>
>
> - move all adjustments into one place
> - specify GDS/GWS/OA alignment in basic units of the heaps
> - it looks like GDS alignment was 1 instead of 4
>
> Signed-off-by: Marek Olšák <marek.olsak at amd.com>

Reviewed-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c    |  7 -------
>   drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 16 ++++++++++++----
>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c    |  6 +++---
>   3 files changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> index f4f00217546e..d21dd2f369da 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
> @@ -47,24 +47,20 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,
>   			     u64 flags, enum ttm_bo_type type,
>   			     struct reservation_object *resv,
>   			     struct drm_gem_object **obj)
>   {
>   	struct amdgpu_bo *bo;
>   	struct amdgpu_bo_param bp;
>   	int r;
>   
>   	memset(&bp, 0, sizeof(bp));
>   	*obj = NULL;
> -	/* At least align on page size */
> -	if (alignment < PAGE_SIZE) {
> -		alignment = PAGE_SIZE;
> -	}
>   
>   	bp.size = size;
>   	bp.byte_align = alignment;
>   	bp.type = type;
>   	bp.resv = resv;
>   	bp.preferred_domain = initial_domain;
>   retry:
>   	bp.flags = flags;
>   	bp.domain = initial_domain;
>   	r = amdgpu_bo_create(adev, &bp, &bo);
> @@ -237,23 +233,20 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,
>   	if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |
>   	    AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
>   		if (flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID) {
>   			/* if gds bo is created from user space, it must be
>   			 * passed to bo list
>   			 */
>   			DRM_ERROR("GDS bo cannot be per-vm-bo\n");
>   			return -EINVAL;
>   		}
>   		flags |= AMDGPU_GEM_CREATE_NO_CPU_ACCESS;
> -		/* GDS allocations must be DW aligned */
> -		if (args->in.domains & AMDGPU_GEM_DOMAIN_GDS)
> -			size = ALIGN(size, 4);
>   	}
>   
>   	if (flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID) {
>   		r = amdgpu_bo_reserve(vm->root.base.bo, false);
>   		if (r)
>   			return r;
>   
>   		resv = vm->root.base.bo->tbo.resv;
>   	}
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 728e15e5d68a..fd9c4beeaaa4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -419,26 +419,34 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
>   		.interruptible = (bp->type != ttm_bo_type_kernel),
>   		.no_wait_gpu = false,
>   		.resv = bp->resv,
>   		.flags = TTM_OPT_FLAG_ALLOW_RES_EVICT
>   	};
>   	struct amdgpu_bo *bo;
>   	unsigned long page_align, size = bp->size;
>   	size_t acc_size;
>   	int r;
>   
> -	page_align = roundup(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
> -	if (bp->domain & (AMDGPU_GEM_DOMAIN_GDS | AMDGPU_GEM_DOMAIN_GWS |
> -			  AMDGPU_GEM_DOMAIN_OA))
> +	/* Note that GDS/GWS/OA allocates 1 page per byte/resource. */
> +	if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
> +		/* GWS and OA don't need any alignment. */
> +		page_align = bp->byte_align;
>   		size <<= PAGE_SHIFT;
> -	else
> +	} else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) {
> +		/* Both size and alignment must be a multiple of 4. */
> +		page_align = ALIGN(bp->byte_align, 4);
> +		size = ALIGN(size, 4) << PAGE_SHIFT;
> +	} else {
> +		/* Memory should be aligned at least to a page size. */
> +		page_align = ALIGN(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
>   		size = ALIGN(size, PAGE_SIZE);
> +	}
>   
>   	if (!amdgpu_bo_validate_size(adev, size, bp->domain))
>   		return -ENOMEM;
>   
>   	*bo_ptr = NULL;
>   
>   	acc_size = ttm_bo_dma_acc_size(&adev->mman.bdev, size,
>   				       sizeof(struct amdgpu_bo));
>   
>   	bo = kzalloc(sizeof(struct amdgpu_bo), GFP_KERNEL);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index b852abb9db0f..73e71e61dc99 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -1749,47 +1749,47 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>   
>   	/* Initialize various on-chip memory pools */
>   	r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GDS,
>   			   adev->gds.mem.total_size);
>   	if (r) {
>   		DRM_ERROR("Failed initializing GDS heap.\n");
>   		return r;
>   	}
>   
>   	r = amdgpu_bo_create_kernel(adev, adev->gds.mem.gfx_partition_size,
> -				    PAGE_SIZE, AMDGPU_GEM_DOMAIN_GDS,
> +				    4, AMDGPU_GEM_DOMAIN_GDS,
>   				    &adev->gds.gds_gfx_bo, NULL, NULL);
>   	if (r)
>   		return r;
>   
>   	r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_GWS,
>   			   adev->gds.gws.total_size);
>   	if (r) {
>   		DRM_ERROR("Failed initializing gws heap.\n");
>   		return r;
>   	}
>   
>   	r = amdgpu_bo_create_kernel(adev, adev->gds.gws.gfx_partition_size,
> -				    PAGE_SIZE, AMDGPU_GEM_DOMAIN_GWS,
> +				    1, AMDGPU_GEM_DOMAIN_GWS,
>   				    &adev->gds.gws_gfx_bo, NULL, NULL);
>   	if (r)
>   		return r;
>   
>   	r = ttm_bo_init_mm(&adev->mman.bdev, AMDGPU_PL_OA,
>   			   adev->gds.oa.total_size);
>   	if (r) {
>   		DRM_ERROR("Failed initializing oa heap.\n");
>   		return r;
>   	}
>   
>   	r = amdgpu_bo_create_kernel(adev, adev->gds.oa.gfx_partition_size,
> -				    PAGE_SIZE, AMDGPU_GEM_DOMAIN_OA,
> +				    1, AMDGPU_GEM_DOMAIN_OA,
>   				    &adev->gds.oa_gfx_bo, NULL, NULL);
>   	if (r)
>   		return r;
>   
>   	/* Register debugfs entries for amdgpu_ttm */
>   	r = amdgpu_ttm_debugfs_init(adev);
>   	if (r) {
>   		DRM_ERROR("Failed to init debugfs\n");
>   		return r;
>   	}