[PATCH 20/53] drm/amdgpu/gfx10: set tcp harvest for navi14

[Alex Deucher]

From: Xiaojie Yuan <xiaojie.yuan at amd.com>

Update settings for navi14.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan at amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index b43c16fc6b10..cb732aa8de67 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -1476,6 +1476,7 @@ static void gfx_v10_0_tcp_harvest(struct amdgpu_device *adev)
 	/*
 	 * GCRD_TARGETS_DISABLE field contains
 	 * for Navi10: GL1C=[18:15], SQC=[14:10], TCP=[9:0]
+	 * for Navi14: GL1C=[21:18], SQC=[17:12], TCP=[11:0]
 	 */
 	u32 gcrd_targets_disable_mask = amdgpu_gfx_create_bitmask(
 			2 * max_wgp_per_sh + /* TCP */
@@ -1484,6 +1485,7 @@ static void gfx_v10_0_tcp_harvest(struct amdgpu_device *adev)
 	/*
 	 * UTCL1_UTCL0_INVREQ_DISABLE field contains
 	 * for Navi10: SQG=[24], RMI=[23:20], SQC=[19:10], TCP=[9:0]
+	 * for Navi14: SQG=[28], RMI=[27:24], SQC=[23:12], TCP=[11:0]
 	 */
 	u32 utcl_invreq_disable_mask = amdgpu_gfx_create_bitmask(
 			2 * max_wgp_per_sh + /* TCP */
@@ -1491,7 +1493,7 @@ static void gfx_v10_0_tcp_harvest(struct amdgpu_device *adev)
 			4 + /* RMI */
 			1); /* SQG */
 
-	if (adev->asic_type == CHIP_NAVI10) {
+	if (adev->asic_type == CHIP_NAVI10 || adev->asic_type == CHIP_NAVI14) {
 		mutex_lock(&adev->grbm_idx_mutex);
 		for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
 			for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
-- 
2.20.1