[PATCH libdrm] tests/amdgpu: rename error inject test to umc error
Pan, Xinhui
Xinhui.Pan at amd.com
Mon Jul 8 07:14:23 UTC 2019
We are going to implement per-ip error injection tests. This test
actually only works on UMC.
Signed-off-by: xinhui pan <xinhui.pan at amd.com>
---
tests/amdgpu/ras_tests.c | 62 +++++++++++++++++-----------------------
1 file changed, 27 insertions(+), 35 deletions(-)
diff --git a/tests/amdgpu/ras_tests.c b/tests/amdgpu/ras_tests.c
index 81c34ad6..b3d7903d 100644
--- a/tests/amdgpu/ras_tests.c
+++ b/tests/amdgpu/ras_tests.c
@@ -315,14 +315,14 @@ int suite_ras_tests_clean(void)
static void amdgpu_ras_disable_test(void);
static void amdgpu_ras_enable_test(void);
-static void amdgpu_ras_inject_test(void);
static void amdgpu_ras_query_test(void);
static void amdgpu_ras_basic_test(void);
+static void amdgpu_ras_umc_inject_test(void);
CU_TestInfo ras_tests[] = {
{ "ras basic test", amdgpu_ras_basic_test },
{ "ras query test", amdgpu_ras_query_test },
- { "ras inject test", amdgpu_ras_inject_test },
+ { "ras umc inject test",amdgpu_ras_umc_inject_test },
{ "ras disable test", amdgpu_ras_disable_test },
#if 0
{ "ras enable test", amdgpu_ras_enable_test },
@@ -503,54 +503,55 @@ static void amdgpu_ras_enable_test(void)
}
}
-static void __amdgpu_ras_inject_test(void)
+static void amdgpu_ras_umc_inject_test(void)
{
struct ras_debug_if data;
int ret;
int i;
unsigned long ue, ce, ue_old, ce_old;
+ struct ras_inject_if inject = {
+ .head = {
+ .block = AMDGPU_RAS_BLOCK__UMC,
+ .type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,
+ .sub_block_index = 0,
+ .name = "",
+ },
+ .address = 0,
+ .value = 0,
+ };
+ int timeout = 3;
+ int block = AMDGPU_RAS_BLOCK__UMC;
+ data.inject = inject;
data.op = 2;
- for (i = 0; i < AMDGPU_RAS_BLOCK__LAST; i++) {
- int timeout = 3;
- struct ras_inject_if inject = {
- .head = {
- .block = i,
- .type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE,
- .sub_block_index = 0,
- .name = "",
- },
- .address = 0,
- .value = 0,
- };
- if (amdgpu_ras_is_feature_enabled(i) <= 0)
- continue;
+ for (i = 0; i < devices_count; i++) {
+ set_test_card(i);
- if (!((1 << i) & ras_block_mask_inject))
- continue;
+ if (amdgpu_ras_is_feature_enabled(block) <= 0)
+ break;
- data.inject = inject;
+ if (!((1 << block) & ras_block_mask_inject))
+ break;
- ret = amdgpu_ras_query_err_count(i, &ue_old, &ce_old);
+ ret = amdgpu_ras_query_err_count(block, &ue_old, &ce_old);
CU_ASSERT_EQUAL(ret, 0);
if (ret)
- continue;
+ break;
ret = amdgpu_ras_invoke(&data);
CU_ASSERT_EQUAL(ret, 0);
if (ret)
- continue;
-
+ break;
loop:
while (timeout > 0) {
- ret = amdgpu_ras_query_err_count(i, &ue, &ce);
+ ret = amdgpu_ras_query_err_count(block, &ue, &ce);
CU_ASSERT_EQUAL(ret, 0);
if (ret)
- continue;
+ break;
if (ue_old != ue) {
/*recovery takes ~10s*/
sleep(10);
@@ -566,15 +567,6 @@ loop:
}
}
-static void amdgpu_ras_inject_test(void)
-{
- int i;
- for (i = 0; i < devices_count; i++) {
- set_test_card(i);
- __amdgpu_ras_inject_test();
- }
-}
-
static void __amdgpu_ras_query_test(void)
{
unsigned long ue, ce;
--
2.17.1
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