[PATCH 1/2] drm/amdgpu: switch to macro for psp bootloader command
Alex Deucher
alexdeucher at gmail.com
Wed Jul 10 17:24:59 UTC 2019
On Wed, Jul 10, 2019 at 11:59 AM Hawking Zhang <Hawking.Zhang at amd.com> wrote:
>
Please add a patch description.
> Change-Id: Ief4c1e5ca01df0a028a784c0faf37544939733a3
> Signed-off-by: Hawking Zhang <Hawking.Zhang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 9 +++++++++
> drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | 4 ++--
> 3 files changed, 13 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> index e28cf5e..8ddcec1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
> @@ -42,6 +42,15 @@ struct psp_context;
> struct psp_xgmi_node_info;
> struct psp_xgmi_topology_info;
>
> +enum psp_bootloader_cmd {
> + PSP_BL__LOAD_SYSDRV = 0x10000,
> + PSP_BL__LOAD_SOSDRV = 0x20000,
> + PSP_BL__NO_ECC = 0x40000,
> + PSP_BL__PARTIAL_ECC = 0x50000,
> + PSP_BL__FULL_ECC = 0x60000,
> + PSP_BL__LOAD_KEY_DATABASE = 0x80000,
> +};
> +
Maybe this would be better in psp_gfx_if.h since it's sort of part of
the firmware interface, but I guess it's not really part of the psp
ring interface. Either way, with the patch description added, the
series is:
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> enum psp_ring_type
> {
> PSP_RING_TYPE__INVALID = 0,
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> index 1b6c20c..e784091 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> @@ -212,7 +212,7 @@ static int psp_v11_0_bootloader_load_sysdrv(struct psp_context *psp)
> /* Provide the sys driver to bootloader */
> WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
> (uint32_t)(psp->fw_pri_mc_addr >> 20));
> - psp_gfxdrv_command_reg = 1 << 16;
> + psp_gfxdrv_command_reg = PSP_BL__LOAD_SYSDRV;
> WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,
> psp_gfxdrv_command_reg);
>
> @@ -253,7 +253,7 @@ static int psp_v11_0_bootloader_load_sos(struct psp_context *psp)
> /* Provide the PSP secure OS to bootloader */
> WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
> (uint32_t)(psp->fw_pri_mc_addr >> 20));
> - psp_gfxdrv_command_reg = 2 << 16;
> + psp_gfxdrv_command_reg = PSP_BL__LOAD_SOSDRV;
> WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,
> psp_gfxdrv_command_reg);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c b/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
> index 3f58277..ec3a056 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
> @@ -153,7 +153,7 @@ static int psp_v3_1_bootloader_load_sysdrv(struct psp_context *psp)
> /* Provide the sys driver to bootloader */
> WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
> (uint32_t)(psp->fw_pri_mc_addr >> 20));
> - psp_gfxdrv_command_reg = 1 << 16;
> + psp_gfxdrv_command_reg = PSP_BL__LOAD_SYSDRV;
> WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,
> psp_gfxdrv_command_reg);
>
> @@ -216,7 +216,7 @@ static int psp_v3_1_bootloader_load_sos(struct psp_context *psp)
> /* Provide the PSP secure OS to bootloader */
> WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36,
> (uint32_t)(psp->fw_pri_mc_addr >> 20));
> - psp_gfxdrv_command_reg = 2 << 16;
> + psp_gfxdrv_command_reg = PSP_BL__LOAD_SOSDRV;
> WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35,
> psp_gfxdrv_command_reg);
>
> --
> 2.7.4
>
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