[PATCH] drm/amd/powerplay: fix smu clock type change miss error

[Xu, Feifei]

Reviewed-by: Feifei Xu <Feifei.Xu at amd.com>

> On Jul 11, 2019, at 21:40, Wang, Kevin(Yang) <Kevin1.Wang at amd.com> wrote:
> 
> in the smu module, use the smu_xxxclk type to identify the CLK type
> use SMU_SCLK, SMU_MCLK to replace PP_SCLK, PP_MCLK.
> 
> Change-Id: Ifa870aea38f043e1983f6f0560eed2ac070b68b7
> Signed-off-by: Kevin Wang <kevin1.wang at amd.com>
> ---
> drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> index 1c15f02101fe..de6cc5d489cd 100644
> --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> @@ -1386,8 +1386,8 @@ int smu_adjust_power_state_dynamic(struct smu_context *smu,
>                             &soc_mask);
>            if (ret)
>                return ret;
> -            smu_force_clk_levels(smu, PP_SCLK, 1 << sclk_mask);
> -            smu_force_clk_levels(smu, PP_MCLK, 1 << mclk_mask);
> +            smu_force_clk_levels(smu, SMU_SCLK, 1 << sclk_mask);
> +            smu_force_clk_levels(smu, SMU_MCLK, 1 << mclk_mask);
>            break;
> 
>        case AMD_DPM_FORCED_LEVEL_MANUAL:
> -- 
> 2.22.0
> 
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