[PATCH] drm/amd/powerplay: add pstate mclk(uclk) support for navi10

[Quan, Evan]

Reviewed-by: Evan Quan <evan.quan at amd.com>

> -----Original Message-----
> From: Wang, Kevin(Yang) <Kevin1.Wang at amd.com>
> Sent: Friday, July 12, 2019 11:34 AM
> To: amd-gfx at lists.freedesktop.org
> Cc: Feng, Kenneth <Kenneth.Feng at amd.com>; Quan, Evan
> <Evan.Quan at amd.com>; Wang, Kevin(Yang) <Kevin1.Wang at amd.com>
> Subject: [PATCH] drm/amd/powerplay: add pstate mclk(uclk) support for
> navi10
> 
> add pstate mclk(uclk) support.
> 
> Change-Id: I7f3bca4901833b4ea213fe02249fc055b80e5cdd
> Signed-off-by: Kevin Wang <kevin1.wang at amd.com>
> ---
>  drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 1 +
> drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 8 +++++++-
>  2 files changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> index de6cc5d489cd..67db2746ec4f 100644
> --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> @@ -136,6 +136,7 @@ int smu_get_dpm_freq_range(struct smu_context
> *smu, enum smu_clk_type clk_type,
>  		return -EINVAL;
> 
>  	switch (clk_type) {
> +	case SMU_MCLK:
>  	case SMU_UCLK:
>  		if (!smu_feature_is_enabled(smu,
> SMU_FEATURE_DPM_UCLK_BIT)) {
>  			pr_warn("uclk dpm is not enabled\n"); diff --git
> a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> index cd32b20a13c1..16a4c1ca98cf 100644
> --- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
> @@ -709,7 +709,7 @@ static int navi10_force_clk_levels(struct smu_context
> *smu,  static int navi10_populate_umd_state_clk(struct smu_context *smu)
> {
>  	int ret = 0;
> -	uint32_t min_sclk_freq = 0;
> +	uint32_t min_sclk_freq = 0, min_mclk_freq = 0;
> 
>  	ret = smu_get_dpm_freq_range(smu, SMU_SCLK, &min_sclk_freq,
> NULL);
>  	if (ret)
> @@ -717,6 +717,12 @@ static int navi10_populate_umd_state_clk(struct
> smu_context *smu)
> 
>  	smu->pstate_sclk = min_sclk_freq * 100;
> 
> +	ret = smu_get_dpm_freq_range(smu, SMU_MCLK, &min_mclk_freq,
> NULL);
> +	if (ret)
> +		return ret;
> +
> +	smu->pstate_mclk = min_mclk_freq * 100;
> +
>  	return ret;
>  }
> 
> --
> 2.22.0