[PATCH 1/3] drm/amd/powerplay: add socclk profile dpm support.

[Wang, Kevin(Yang)]

1.miss socclk profile support when bringup.
2.add feature check for socclk.

Change-Id: I8f5b92dc8384fd03b540a2f654bd40f1ebf56c85
Signed-off-by: Kevin Wang <kevin1.wang at amd.com>
---
 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index e8ae6f5a14aa..ce77bb3ecff3 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -148,6 +148,11 @@ int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
 			pr_warn("gfxclk dpm is not enabled\n");
 			return 0;
 		}
+	case SMU_SOCCLK:
+		if (!smu_feature_is_enabled(smu, SMU_FEATURE_DPM_SOCCLK_BIT)) {
+			pr_warn("sockclk dpm is not enabled\n");
+			return 0;
+		}
 		break;
 	default:
 		break;
@@ -1343,6 +1348,7 @@ int smu_adjust_power_state_dynamic(struct smu_context *smu,
 				return ret;
 			smu_force_clk_levels(smu, SMU_SCLK, 1 << sclk_mask);
 			smu_force_clk_levels(smu, SMU_MCLK, 1 << mclk_mask);
+			smu_force_clk_levels(smu, SMU_SOCCLK, 1 << soc_mask);
 			break;
 
 		case AMD_DPM_FORCED_LEVEL_MANUAL:
-- 
2.22.0