[PATCH 00/87] DC Patches 15 Jul, 2019

sunpeng.li at amd.com sunpeng.li at amd.com
Mon Jul 15 21:19:22 UTC 2019


From: Leo Li <sunpeng.li at amd.com>

Lots of patches this time, sorry for the volume! Regular DC promotions
were put on hold while Navi was being reviewed and upstreamed. These
patches were what accumulated during that period.

Summary of change:
* Implement DPRX CRC source capture
* Implement CRC source readback
* Navi Bandwidth calcs refactor
* Misc fixes for Navi:
    * Dual GPU boot black screen
    * Flip timeouts
    * Workaround for p-state hangs on high-bandwidth timings


Alvin Lee (4):
  drm/amd/display: Disable Audio on reinitialize hardware
  drm/amd/display: Remove second initialization of pp_smu
  drm/amd/display: Wait for flip to complete
  drm/amd/display: Only enable audio if speaker allocation exists

Anthony Koo (1):
  drm/amd/display: add monitor patch to add T7 delay

Aric Cyr (7):
  drm/amd/display: 3.2.36
  drm/amd/display: 3.2.37
  drm/amd/display: 3.2.38
  drm/amd/display: 3.2.39
  drm/amd/display: 3.2.40
  drm/amd/display: 3.2.41
  drm/amd/display: 3.2.42

Charlene Liu (4):
  drm/amd/display: Split out common HUBP registers and code
  drm/amd/display: Do not fill Null packet in the blank period
  drm/amd/display: add set and get clock for testing purposes
  drm/amd/display: add a option to force the clock at every mode change.

Chiawen Huang (1):
  drm/amd/display: Add aux tracing log in dce

Dale Zhao (1):
  drm/amd/display: handle active dongle port type is DP++ or DP case

David Francis (1):
  drm/amd/display: Update drm_dsc to reflect native 4.2.0 DSC spec

David Galiffi (2):
  drm/amd/display: Add ability to set preferred link training
    parameters.
  drm/amd/display: Incorrect Read Interval Time For CR Sequence

Derek Lai (2):
  drm/amd/display: Read max down spread
  drm/amd/display: allocate 4 ddc engines for RV2

Dingchen Zhang (3):
  drm/amd/display: add functionality to grab DPRX CRC entries.
  drm/amd/display: add functionality to get pipe CRC source.
  drm/amd/display: add pipe CRC sources without disabling dithering.

Dmytro Laktyushkin (6):
  drm/amd/display: fix dsc disable
  drm/amd/display: Set default block_size, even in unexpected cases
  drm/amd/display: add hdmi2.1 dsc pps packet programming
  drm/amd/display: Remove dsc disable_ich flag programming.
  drm/amd/display: use min disp and dpp clk debug option for dcn2
  drm/amd/display: add dcc programming for dual plane

Eric Bernstein (1):
  drm/amd/display: Use helper for determining HDMI signal

Eric Yang (5):
  drm/amd/display: move bw calc code into helpers
  drm/amd/display: early return when pipe_cnt is 0 in bw validation
  drm/amd/display: put back front end initialization sequence
  drm/amd/display: do not read link setting if edp not connected
  drm/amd/display: fix mpcc assert condition

Fatemeh Darbehani (2):
  drm/amd/display: Change min_h_sync_width from 8 to 4
  drm/amd/display: Add SMU version field to clk_mgr_internal

Harmanprit Tatla (1):
  drm/amd/display: No audio endpoint for Dell MST display

Harry Wentland (1):
  drm/amd/display: Remove unnecessary NULL check in
    set_preferred_link_settings

Ilya Bakoulin (5):
  drm/amd/display: Expose enc2_set_dynamic_metadata
  drm/amd/display: Check for valid stream_encode
  drm/amd/display: Fix some HUBP programming issues
  drm/amd/display: Cache the use_pitch_c conditional
  drm/amd/display: Fixes for some MPO cases

Joshua Aberback (1):
  drm/amd/display: Add debug option to disable timing sync

Julian Parkin (3):
  drm/amd/display: Poll for GPUVM context ready
  drm/amd/display: Fix dc_create failure handling and 666 color depths
  drm/amd/display: Clean up dynamic metadata logic

Jun Lei (6):
  drm/amd/display: initialize p_state to proper value
  drm/amd/display: fix up HUBBUB hw programming for VM
  drm/amd/display: cap DCFCLK hardmin to 507 for NV10
  drm/amd/display: swap system aperture high/low
  drm/amd/display: populate last calculated bb state with max clocks
  drm/amd/display: support "dummy pstate"

Krunoslav Kovac (1):
  drm/amd/display: Optimize gamma calculations

Lewis Huang (1):
  drm/amd/display: Add debug entry to destroy disconnected edp link

Murton Liu (4):
  drm/amd/display: Clock does not lower in Updateplanes
  drm/amd/display: Implement generic MUX registers
  drm/amd/display: Hook up calls to do stereo mux and dig programming to
    stereo control interface
  drm/amd/display: Change offset_to_id to reflect what id_to_offset
    returns

Nevenko Stupar (2):
  drm/amd/display:Use Pixel clock in 100Hz units for HDMI Audio wall
    clock DTO
  drm/amd/display: Add DIG_CLOCK_PATTERN register

Nicholas Kazlauskas (4):
  drm/amd/display: Copy max_clks_by_state after dce_clk_mgr_construct
  drm/amd/display: Set enabled to false at start of audio disable
  drm/amd/display: Copy GSL groups when committing a new context
  drm/amd/display: Force uclk to max for every state

Nikola Cornij (4):
  drm/amd/display: Set one 4:2:0-related PPS field as recommended by DSC
    spec
  drm/amd/display: Power-gate all DSCs at driver init time
  drm/amd/display: Set FEC_READY always before link training
  drm/amd/display: Clear FEC_READY shadow register if DPCD write fails

Qingqing Zhuo (1):
  drm/amd/display: Add CM_BYPASS via debug option

Reza Amini (1):
  drm/amd/display: Implement DAL3 GPU Integer Scaling

Samson Tam (1):
  drm/amd/display: skip retrain in dc_link_set_preferred_link_settings()
    if using passive dongle

SivapiriyanKumarasamy (1):
  drm/amd/display: Wait for backlight programming completion in set
    backlight level

Su Sung Chung (2):
  drm/amd/display: refactor dump_clk_registers
  drm/amd/display: fix not calling ppsmu to trigger PME

Tai Man (2):
  drm/amd/display: use encoder's engine id to find matched free audio
    device
  drm/amd/display: Increase size of audios array

Tony Cheng (1):
  drm/amd/display: avoid power gate domains that doesn't exist

Vitaly Prosyak (1):
  drm/amd/display: Add MPC 3DLUT resource management

Wenjing Liu (1):
  drm/amd/display: wait for the whole frame after global unlock

Zhan Liu (1):
  drm/amd/display: drop ASSERT() if eDP panel is not connected

Zi Yu Liao (1):
  drm/amd/display: fix DMCU hang when going into Modern Standby

hersen wu (1):
  drm/amd/display: init res_pool dccg_ref, dchub_ref with xtalin_freq

 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c    |    1 +
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |   60 +-
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |   16 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c |  139 +-
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h |   61 +
 .../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c  |    6 +-
 .../gpu/drm/amd/display/dc/calcs/dce_calcs.c  |    2 +-
 .../gpu/drm/amd/display/dc/calcs/dcn_calcs.c  |    2 +-
 .../dc/clk_mgr/dce110/dce110_clk_mgr.c        |    4 +-
 .../dc/clk_mgr/dce112/dce112_clk_mgr.c        |    4 +-
 .../dc/clk_mgr/dce120/dce120_clk_mgr.c        |    4 +-
 .../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c  |   39 +-
 .../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h  |    5 +
 drivers/gpu/drm/amd/display/dc/core/dc.c      |   96 +-
 .../gpu/drm/amd/display/dc/core/dc_debug.c    |   40 +-
 drivers/gpu/drm/amd/display/dc/core/dc_link.c |  101 +-
 .../gpu/drm/amd/display/dc/core/dc_link_dp.c  |  394 +-
 .../drm/amd/display/dc/core/dc_link_hwss.c    |   45 +-
 .../gpu/drm/amd/display/dc/core/dc_resource.c |   69 +-
 .../gpu/drm/amd/display/dc/core/dc_stream.c   |   26 +-
 .../gpu/drm/amd/display/dc/core/dc_surface.c  |    3 +-
 drivers/gpu/drm/amd/display/dc/dc.h           |   44 +-
 drivers/gpu/drm/amd/display/dc/dc_dp_types.h  |   21 +
 drivers/gpu/drm/amd/display/dc/dc_hw_types.h  |   56 +-
 drivers/gpu/drm/amd/display/dc/dc_link.h      |   11 +
 drivers/gpu/drm/amd/display/dc/dc_types.h     |   14 +
 drivers/gpu/drm/amd/display/dc/dce/dce_abm.c  |    4 +
 .../gpu/drm/amd/display/dc/dce/dce_audio.c    |   28 +-
 drivers/gpu/drm/amd/display/dc/dce/dce_aux.c  |    9 +-
 .../gpu/drm/amd/display/dc/dce/dce_hwseq.h    |    7 +-
 .../drm/amd/display/dc/dce/dce_mem_input.c    |   10 +-
 .../amd/display/dc/dce/dce_stream_encoder.c   |   30 +-
 .../display/dc/dce110/dce110_hw_sequencer.c   |   70 +-
 .../display/dc/dce110/dce110_mem_input_v.c    |   42 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c |   70 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h |   27 +-
 .../amd/display/dc/dcn10/dcn10_hw_sequencer.c |   85 +-
 .../dc/dcn10/dcn10_hw_sequencer_debug.c       |    2 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c  |    2 +-
 .../drm/amd/display/dc/dcn10/dcn10_resource.c |    2 +-
 .../display/dc/dcn10/dcn10_stream_encoder.c   |   33 +-
 .../display/dc/dcn10/dcn10_stream_encoder.h   |   16 +-
 .../drm/amd/display/dc/dcn20/dcn20_dpp_cm.c   |    7 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c  |    8 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.h  |    4 +-
 .../drm/amd/display/dc/dcn20/dcn20_hubbub.c   |   29 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c |  688 ++-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h |   62 +-
 .../drm/amd/display/dc/dcn20/dcn20_hwseq.c    |  221 +-
 .../drm/amd/display/dc/dcn20/dcn20_hwseq.h    |   14 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c  |   34 +-
 .../gpu/drm/amd/display/dc/dcn20/dcn20_optc.c |    2 +-
 .../drm/amd/display/dc/dcn20/dcn20_resource.c |  356 +-
 .../drm/amd/display/dc/dcn20/dcn20_resource.h |   12 +
 .../display/dc/dcn20/dcn20_stream_encoder.c   |    2 +-
 .../display/dc/dcn20/dcn20_stream_encoder.h   |    5 +
 .../gpu/drm/amd/display/dc/dcn20/dcn20_vmid.c |   35 +
 drivers/gpu/drm/amd/display/dc/dm_services.h  |    1 +
 drivers/gpu/drm/amd/display/dc/dml/Makefile   |    3 +
 .../dc/dml/dcn20/display_mode_vba_20v2.c      | 5109 +++++++++++++++++
 .../dc/dml/dcn20/display_mode_vba_20v2.h      |   32 +
 .../dc/dml/dcn20/display_rq_dlg_calc_20v2.c   | 1701 ++++++
 .../dc/dml/dcn20/display_rq_dlg_calc_20v2.h   |   74 +
 .../drm/amd/display/dc/dml/display_mode_lib.c |   12 +
 .../drm/amd/display/dc/dml/display_mode_lib.h |    1 +
 .../amd/display/dc/dml/display_mode_structs.h |    1 +
 .../drm/amd/display/dc/dml/display_mode_vba.c |    8 +-
 .../gpu/drm/amd/display/dc/dsc/drm_dsc_dc.c   |   79 +-
 drivers/gpu/drm/amd/display/dc/gpio/Makefile  |    2 +-
 .../display/dc/gpio/dcn10/hw_factory_dcn10.c  |   42 +-
 .../display/dc/gpio/dcn20/hw_factory_dcn20.c  |   41 +-
 .../dc/gpio/dcn20/hw_translate_dcn20.c        |    2 +-
 .../dc/gpio/diagnostics/hw_factory_diag.c     |    1 +
 .../drm/amd/display/dc/gpio/generic_regs.h    |   66 +
 .../drm/amd/display/dc/gpio/gpio_service.c    |   68 +
 .../gpu/drm/amd/display/dc/gpio/hw_factory.h  |    3 +
 .../gpu/drm/amd/display/dc/gpio/hw_generic.c  |  132 +
 .../gpu/drm/amd/display/dc/gpio/hw_generic.h  |   46 +
 .../gpu/drm/amd/display/dc/inc/core_status.h  |    3 +
 .../gpu/drm/amd/display/dc/inc/core_types.h   |    2 +-
 .../gpu/drm/amd/display/dc/inc/dc_link_dp.h   |    1 +
 .../gpu/drm/amd/display/dc/inc/hw/clk_mgr.h   |    7 +
 .../amd/display/dc/inc/hw/clk_mgr_internal.h  |    3 +
 .../gpu/drm/amd/display/dc/inc/hw/dchubbub.h  |    4 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h   |    1 +
 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h  |    2 +-
 .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h |    1 +
 .../gpu/drm/amd/display/dc/inc/hw/mem_input.h |    2 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h   |    1 +
 .../gpu/drm/amd/display/dc/inc/hw_sequencer.h |   10 +
 .../gpu/drm/amd/display/dc/inc/link_hwss.h    |    2 +-
 .../gpu/drm/amd/display/include/audio_types.h |    4 +-
 .../gpu/drm/amd/display/include/dpcd_defs.h   |    2 +-
 .../display/include/gpio_service_interface.h  |   18 +-
 .../amd/display/include/link_service_types.h  |   17 +-
 .../amd/display/modules/color/color_gamma.c   |  163 +-
 .../amd/display/modules/color/color_gamma.h   |    9 +
 97 files changed, 10040 insertions(+), 815 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crc.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/generic_regs.h
 create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/gpio/hw_generic.h

-- 
2.22.0



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