[PATCH 45/87] drm/amd/display: Remove second initialization of pp_smu
sunpeng.li at amd.com
sunpeng.li at amd.com
Mon Jul 15 21:20:07 UTC 2019
From: Alvin Lee <alvin.lee2 at amd.com>
[why]
We initialize pp_smu twice
[how]
Remove second initialization of pp_smu
Signed-off-by: Alvin Lee <alvin.lee2 at amd.com>
Reviewed-by: Jaehyun Chung <Jaehyun.Chung at amd.com>
Acked-by: Leo Li <sunpeng.li at amd.com>
---
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
index 4842c91771d8..e9a7a7af11df 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c
@@ -346,8 +346,6 @@ void dcn20_clk_mgr_construct(
clk_mgr->base.dprefclk_khz = 700000; // 700 MHz planned if VCO is 3.85 GHz, will be retrieved
- clk_mgr->pp_smu = pp_smu;
-
if (IS_FPGA_MAXIMUS_DC(ctx->dce_environment)) {
dcn2_funcs.update_clocks = dcn2_update_clocks_fpga;
clk_mgr->dentist_vco_freq_khz = 3850000;
--
2.22.0
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