[PATCH 036/102] drm/amdgpu: correct Arcturus SDMA address space base index
Alex Deucher
alexdeucher at gmail.com
Mon Jul 15 21:23:31 UTC 2019
From: Le Ma <le.ma at amd.com>
Signed-off-by: Le Ma <le.ma at amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index fc01502baf00..974228b918d2 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -208,17 +208,17 @@ static u32 sdma_v4_0_get_reg_offset(struct amdgpu_device *adev,
case 1:
return (adev->reg_offset[SDMA1_HWIP][0][0] + offset);
case 2:
- return (adev->reg_offset[SDMA2_HWIP][0][0] + offset);
+ return (adev->reg_offset[SDMA2_HWIP][0][1] + offset);
case 3:
- return (adev->reg_offset[SDMA3_HWIP][0][0] + offset);
+ return (adev->reg_offset[SDMA3_HWIP][0][1] + offset);
case 4:
- return (adev->reg_offset[SDMA4_HWIP][0][0] + offset);
+ return (adev->reg_offset[SDMA4_HWIP][0][1] + offset);
case 5:
- return (adev->reg_offset[SDMA5_HWIP][0][0] + offset);
+ return (adev->reg_offset[SDMA5_HWIP][0][1] + offset);
case 6:
- return (adev->reg_offset[SDMA6_HWIP][0][0] + offset);
+ return (adev->reg_offset[SDMA6_HWIP][0][1] + offset);
case 7:
- return (adev->reg_offset[SDMA7_HWIP][0][0] + offset);
+ return (adev->reg_offset[SDMA7_HWIP][0][1] + offset);
default:
break;
}
--
2.20.1
More information about the amd-gfx
mailing list