[PATCH 089/102] drm/amdgpu: init gds config for arct
Alex Deucher
alexdeucher at gmail.com
Mon Jul 15 21:24:24 UTC 2019
From: Hawking Zhang <Hawking.Zhang at amd.com>
arct has 4KB gds (4 banks inside). there are 32 * 128 (CUs)
so the max_wave_id should be 0xfff
Signed-off-by: Hawking Zhang <Hawking.Zhang at amd.com>
Reviewed-by: Le Ma <Le.Ma at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 560e607e7049..2f553595a898 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -5482,6 +5482,7 @@ static void gfx_v9_0_set_gds_init(struct amdgpu_device *adev)
adev->gds.gds_size = 0x10000;
break;
case CHIP_RAVEN:
+ case CHIP_ARCTURUS:
adev->gds.gds_size = 0x1000;
break;
default:
@@ -5503,6 +5504,9 @@ static void gfx_v9_0_set_gds_init(struct amdgpu_device *adev)
else
adev->gds.gds_compute_max_wave_id = 0x15f; /* raven1 */
break;
+ case CHIP_ARCTURUS:
+ adev->gds.gds_compute_max_wave_id = 0xfff;
+ break;
default:
/* this really depends on the chip */
adev->gds.gds_compute_max_wave_id = 0x7ff;
--
2.20.1
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