[PATCH] drm/amdgpu: use VCN firmware offset for cache window
Christian König
ckoenig.leichtzumerken at gmail.com
Fri Jul 19 07:32:30 UTC 2019
Am 18.07.19 um 17:49 schrieb Liu, Leo:
> Since we are using the signed FW now, and also using PSP firmware loading,
> but it's still potential to break driver when loading FW directly
> instead of PSP, so we should add offset.
>
> Signed-off-by: Leo Liu <leo.liu at amd.com>
Acked-by: Christian König <christian.koenig at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> index 3cb62e448a37..88e3dedcf926 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
> @@ -379,11 +379,8 @@ static void vcn_v2_0_mc_resume(struct amdgpu_device *adev)
> WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH,
> upper_32_bits(adev->vcn.inst->gpu_addr));
> offset = size;
> - /* No signed header for now from firmware
> WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0,
> AMDGPU_UVD_FIRMWARE_OFFSET >> 3);
> - */
> - WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0);
> }
>
> WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size);
More information about the amd-gfx
mailing list