[PATCH 2/5] drm/amd/powerplay: add smu message name support
Feng, Kenneth
Kenneth.Feng at amd.com
Thu Jul 25 07:44:54 UTC 2019
A little difficult for me to understand, but the logic is ok.
Reviewed-by: Kenneth Feng <kenneth.feng at amd.com>
-----Original Message-----
From: Wang, Kevin(Yang)
Sent: Thursday, July 25, 2019 1:11 PM
To: amd-gfx at lists.freedesktop.org
Cc: Feng, Kenneth <Kenneth.Feng at amd.com>; Huang, Ray <Ray.Huang at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Wang, Kevin(Yang) <Kevin1.Wang at amd.com>
Subject: [PATCH 2/5] drm/amd/powerplay: add smu message name support
add smu_get_message_name support in smu.
Signed-off-by: Kevin Wang <kevin1.wang at amd.com>
---
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 13 ++
.../gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 1 +
drivers/gpu/drm/amd/powerplay/inc/smu_types.h | 205 +++++++++---------
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 12 +-
4 files changed, 124 insertions(+), 107 deletions(-)
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 6935a00cd389..4604b6af56bb 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -29,6 +29,19 @@
#include "smu_v11_0.h"
#include "atom.h"
+#undef __SMU_DUMMY_MAP
+#define __SMU_DUMMY_MAP(type) #type
+static const char* __smu_message_names[] = {
+ SMU_MESSAGE_TYPES
+};
+
+const char *smu_get_message_name(struct smu_context *smu, enum
+smu_message_type type) {
+ if (type < 0 || type > SMU_MSG_MAX_COUNT)
+ return "unknow smu message";
+ return __smu_message_names[type];
+}
+
int smu_get_smc_version(struct smu_context *smu, uint32_t *if_version, uint32_t *smu_version) {
int ret = 0;
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index 397040a4d1b4..035f857922ec 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -804,5 +804,6 @@ enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu); int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level); int smu_set_display_count(struct smu_context *smu, uint32_t count); bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type);
+const char *smu_get_message_name(struct smu_context *smu, enum
+smu_message_type type);
#endif
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_types.h b/drivers/gpu/drm/amd/powerplay/inc/smu_types.h
index 29d14c162417..d42e3424e704 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_types.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_types.h
@@ -23,108 +23,112 @@
#ifndef __SMU_TYPES_H__
#define __SMU_TYPES_H__
+#define SMU_MESSAGE_TYPES \
+ __SMU_DUMMY_MAP(TestMessage), \
+ __SMU_DUMMY_MAP(GetSmuVersion), \
+ __SMU_DUMMY_MAP(GetDriverIfVersion), \
+ __SMU_DUMMY_MAP(SetAllowedFeaturesMaskLow), \
+ __SMU_DUMMY_MAP(SetAllowedFeaturesMaskHigh), \
+ __SMU_DUMMY_MAP(EnableAllSmuFeatures), \
+ __SMU_DUMMY_MAP(DisableAllSmuFeatures), \
+ __SMU_DUMMY_MAP(EnableSmuFeaturesLow), \
+ __SMU_DUMMY_MAP(EnableSmuFeaturesHigh), \
+ __SMU_DUMMY_MAP(DisableSmuFeaturesLow), \
+ __SMU_DUMMY_MAP(DisableSmuFeaturesHigh), \
+ __SMU_DUMMY_MAP(GetEnabledSmuFeaturesLow), \
+ __SMU_DUMMY_MAP(GetEnabledSmuFeaturesHigh), \
+ __SMU_DUMMY_MAP(SetWorkloadMask), \
+ __SMU_DUMMY_MAP(SetPptLimit), \
+ __SMU_DUMMY_MAP(SetDriverDramAddrHigh), \
+ __SMU_DUMMY_MAP(SetDriverDramAddrLow), \
+ __SMU_DUMMY_MAP(SetToolsDramAddrHigh), \
+ __SMU_DUMMY_MAP(SetToolsDramAddrLow), \
+ __SMU_DUMMY_MAP(TransferTableSmu2Dram), \
+ __SMU_DUMMY_MAP(TransferTableDram2Smu), \
+ __SMU_DUMMY_MAP(UseDefaultPPTable), \
+ __SMU_DUMMY_MAP(UseBackupPPTable), \
+ __SMU_DUMMY_MAP(RunBtc), \
+ __SMU_DUMMY_MAP(RequestI2CBus), \
+ __SMU_DUMMY_MAP(ReleaseI2CBus), \
+ __SMU_DUMMY_MAP(SetFloorSocVoltage), \
+ __SMU_DUMMY_MAP(SoftReset), \
+ __SMU_DUMMY_MAP(StartBacoMonitor), \
+ __SMU_DUMMY_MAP(CancelBacoMonitor), \
+ __SMU_DUMMY_MAP(EnterBaco), \
+ __SMU_DUMMY_MAP(SetSoftMinByFreq), \
+ __SMU_DUMMY_MAP(SetSoftMaxByFreq), \
+ __SMU_DUMMY_MAP(SetHardMinByFreq), \
+ __SMU_DUMMY_MAP(SetHardMaxByFreq), \
+ __SMU_DUMMY_MAP(GetMinDpmFreq), \
+ __SMU_DUMMY_MAP(GetMaxDpmFreq), \
+ __SMU_DUMMY_MAP(GetDpmFreqByIndex), \
+ __SMU_DUMMY_MAP(GetDpmClockFreq), \
+ __SMU_DUMMY_MAP(GetSsVoltageByDpm), \
+ __SMU_DUMMY_MAP(SetMemoryChannelConfig), \
+ __SMU_DUMMY_MAP(SetGeminiMode), \
+ __SMU_DUMMY_MAP(SetGeminiApertureHigh), \
+ __SMU_DUMMY_MAP(SetGeminiApertureLow), \
+ __SMU_DUMMY_MAP(SetMinLinkDpmByIndex), \
+ __SMU_DUMMY_MAP(OverridePcieParameters), \
+ __SMU_DUMMY_MAP(OverDriveSetPercentage), \
+ __SMU_DUMMY_MAP(SetMinDeepSleepDcefclk), \
+ __SMU_DUMMY_MAP(ReenableAcDcInterrupt), \
+ __SMU_DUMMY_MAP(NotifyPowerSource), \
+ __SMU_DUMMY_MAP(SetUclkFastSwitch), \
+ __SMU_DUMMY_MAP(SetUclkDownHyst), \
+ __SMU_DUMMY_MAP(GfxDeviceDriverReset), \
+ __SMU_DUMMY_MAP(GetCurrentRpm), \
+ __SMU_DUMMY_MAP(SetVideoFps), \
+ __SMU_DUMMY_MAP(SetTjMax), \
+ __SMU_DUMMY_MAP(SetFanTemperatureTarget), \
+ __SMU_DUMMY_MAP(PrepareMp1ForUnload), \
+ __SMU_DUMMY_MAP(DramLogSetDramAddrHigh), \
+ __SMU_DUMMY_MAP(DramLogSetDramAddrLow), \
+ __SMU_DUMMY_MAP(DramLogSetDramSize), \
+ __SMU_DUMMY_MAP(SetFanMaxRpm), \
+ __SMU_DUMMY_MAP(SetFanMinPwm), \
+ __SMU_DUMMY_MAP(ConfigureGfxDidt), \
+ __SMU_DUMMY_MAP(NumOfDisplays), \
+ __SMU_DUMMY_MAP(RemoveMargins), \
+ __SMU_DUMMY_MAP(ReadSerialNumTop32), \
+ __SMU_DUMMY_MAP(ReadSerialNumBottom32), \
+ __SMU_DUMMY_MAP(SetSystemVirtualDramAddrHigh), \
+ __SMU_DUMMY_MAP(SetSystemVirtualDramAddrLow), \
+ __SMU_DUMMY_MAP(WaflTest), \
+ __SMU_DUMMY_MAP(SetFclkGfxClkRatio), \
+ __SMU_DUMMY_MAP(AllowGfxOff), \
+ __SMU_DUMMY_MAP(DisallowGfxOff), \
+ __SMU_DUMMY_MAP(GetPptLimit), \
+ __SMU_DUMMY_MAP(GetDcModeMaxDpmFreq), \
+ __SMU_DUMMY_MAP(GetDebugData), \
+ __SMU_DUMMY_MAP(SetXgmiMode), \
+ __SMU_DUMMY_MAP(RunAfllBtc), \
+ __SMU_DUMMY_MAP(ExitBaco), \
+ __SMU_DUMMY_MAP(PrepareMp1ForReset), \
+ __SMU_DUMMY_MAP(PrepareMp1ForShutdown), \
+ __SMU_DUMMY_MAP(SetMGpuFanBoostLimitRpm), \
+ __SMU_DUMMY_MAP(GetAVFSVoltageByDpm), \
+ __SMU_DUMMY_MAP(PowerUpVcn), \
+ __SMU_DUMMY_MAP(PowerDownVcn), \
+ __SMU_DUMMY_MAP(PowerUpJpeg), \
+ __SMU_DUMMY_MAP(PowerDownJpeg), \
+ __SMU_DUMMY_MAP(BacoAudioD3PME), \
+ __SMU_DUMMY_MAP(ArmD3), \
+ __SMU_DUMMY_MAP(RunGfxDcBtc), \
+ __SMU_DUMMY_MAP(RunSocDcBtc), \
+ __SMU_DUMMY_MAP(SetMemoryChannelEnable), \
+ __SMU_DUMMY_MAP(SetDfSwitchType), \
+ __SMU_DUMMY_MAP(GetVoltageByDpm), \
+ __SMU_DUMMY_MAP(GetVoltageByDpmOverdrive), \
+ __SMU_DUMMY_MAP(PowerUpVcn0), \
+ __SMU_DUMMY_MAP(PowerDownVcn01), \
+ __SMU_DUMMY_MAP(PowerUpVcn1), \
+ __SMU_DUMMY_MAP(PowerDownVcn1), \
+#undef __SMU_DUMMY_MAP
+#define __SMU_DUMMY_MAP(type) SMU_MSG_##type
enum smu_message_type {
- SMU_MSG_TestMessage = 0,
- SMU_MSG_GetSmuVersion,
- SMU_MSG_GetDriverIfVersion,
- SMU_MSG_SetAllowedFeaturesMaskLow,
- SMU_MSG_SetAllowedFeaturesMaskHigh,
- SMU_MSG_EnableAllSmuFeatures,
- SMU_MSG_DisableAllSmuFeatures,
- SMU_MSG_EnableSmuFeaturesLow,
- SMU_MSG_EnableSmuFeaturesHigh,
- SMU_MSG_DisableSmuFeaturesLow,
- SMU_MSG_DisableSmuFeaturesHigh,
- SMU_MSG_GetEnabledSmuFeaturesLow,
- SMU_MSG_GetEnabledSmuFeaturesHigh,
- SMU_MSG_SetWorkloadMask,
- SMU_MSG_SetPptLimit,
- SMU_MSG_SetDriverDramAddrHigh,
- SMU_MSG_SetDriverDramAddrLow,
- SMU_MSG_SetToolsDramAddrHigh,
- SMU_MSG_SetToolsDramAddrLow,
- SMU_MSG_TransferTableSmu2Dram,
- SMU_MSG_TransferTableDram2Smu,
- SMU_MSG_UseDefaultPPTable,
- SMU_MSG_UseBackupPPTable,
- SMU_MSG_RunBtc,
- SMU_MSG_RequestI2CBus,
- SMU_MSG_ReleaseI2CBus,
- SMU_MSG_SetFloorSocVoltage,
- SMU_MSG_SoftReset,
- SMU_MSG_StartBacoMonitor,
- SMU_MSG_CancelBacoMonitor,
- SMU_MSG_EnterBaco,
- SMU_MSG_SetSoftMinByFreq,
- SMU_MSG_SetSoftMaxByFreq,
- SMU_MSG_SetHardMinByFreq,
- SMU_MSG_SetHardMaxByFreq,
- SMU_MSG_GetMinDpmFreq,
- SMU_MSG_GetMaxDpmFreq,
- SMU_MSG_GetDpmFreqByIndex,
- SMU_MSG_GetDpmClockFreq,
- SMU_MSG_GetSsVoltageByDpm,
- SMU_MSG_SetMemoryChannelConfig,
- SMU_MSG_SetGeminiMode,
- SMU_MSG_SetGeminiApertureHigh,
- SMU_MSG_SetGeminiApertureLow,
- SMU_MSG_SetMinLinkDpmByIndex,
- SMU_MSG_OverridePcieParameters,
- SMU_MSG_OverDriveSetPercentage,
- SMU_MSG_SetMinDeepSleepDcefclk,
- SMU_MSG_ReenableAcDcInterrupt,
- SMU_MSG_NotifyPowerSource,
- SMU_MSG_SetUclkFastSwitch,
- SMU_MSG_SetUclkDownHyst,
- SMU_MSG_GfxDeviceDriverReset,
- SMU_MSG_GetCurrentRpm,
- SMU_MSG_SetVideoFps,
- SMU_MSG_SetTjMax,
- SMU_MSG_SetFanTemperatureTarget,
- SMU_MSG_PrepareMp1ForUnload,
- SMU_MSG_DramLogSetDramAddrHigh,
- SMU_MSG_DramLogSetDramAddrLow,
- SMU_MSG_DramLogSetDramSize,
- SMU_MSG_SetFanMaxRpm,
- SMU_MSG_SetFanMinPwm,
- SMU_MSG_ConfigureGfxDidt,
- SMU_MSG_NumOfDisplays,
- SMU_MSG_RemoveMargins,
- SMU_MSG_ReadSerialNumTop32,
- SMU_MSG_ReadSerialNumBottom32,
- SMU_MSG_SetSystemVirtualDramAddrHigh,
- SMU_MSG_SetSystemVirtualDramAddrLow,
- SMU_MSG_WaflTest,
- SMU_MSG_SetFclkGfxClkRatio,
- SMU_MSG_AllowGfxOff,
- SMU_MSG_DisallowGfxOff,
- SMU_MSG_GetPptLimit,
- SMU_MSG_GetDcModeMaxDpmFreq,
- SMU_MSG_GetDebugData,
- SMU_MSG_SetXgmiMode,
- SMU_MSG_RunAfllBtc,
- SMU_MSG_ExitBaco,
- SMU_MSG_PrepareMp1ForReset,
- SMU_MSG_PrepareMp1ForShutdown,
- SMU_MSG_SetMGpuFanBoostLimitRpm,
- SMU_MSG_GetAVFSVoltageByDpm,
- SMU_MSG_PowerUpVcn,
- SMU_MSG_PowerDownVcn,
- SMU_MSG_PowerUpJpeg,
- SMU_MSG_PowerDownJpeg,
- SMU_MSG_BacoAudioD3PME,
- SMU_MSG_ArmD3,
- SMU_MSG_RunGfxDcBtc,
- SMU_MSG_RunSocDcBtc,
- SMU_MSG_SetMemoryChannelEnable,
- SMU_MSG_SetDfSwitchType,
- SMU_MSG_GetVoltageByDpm,
- SMU_MSG_GetVoltageByDpmOverdrive,
- SMU_MSG_PowerUpVcn0,
- SMU_MSG_PowerDownVcn01,
- SMU_MSG_PowerUpVcn1,
- SMU_MSG_PowerDownVcn1,
+ SMU_MESSAGE_TYPES
SMU_MSG_MAX_COUNT,
};
@@ -207,4 +211,3 @@ enum smu_feature_mask { };
#endif
-
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 745b35a1600d..ccf6af055d03 100644
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -102,8 +102,8 @@ static int smu_v11_0_send_msg(struct smu_context *smu, uint16_t msg)
ret = smu_v11_0_wait_for_response(smu);
if (ret)
- pr_err("Failed to send message 0x%x, response 0x%x\n", index,
- ret);
+ pr_err("failed send message: %10s (%d) response %#x\n",
+ smu_get_message_name(smu, msg), index, ret);
return ret;
@@ -123,8 +123,8 @@ smu_v11_0_send_msg_with_param(struct smu_context *smu, uint16_t msg,
ret = smu_v11_0_wait_for_response(smu);
if (ret)
- pr_err("Failed to send message 0x%x, response 0x%x, param 0x%x\n",
- index, ret, param);
+ pr_err("failed send message: %10s (%d) \tparam: 0x%08x response %#x\n",
+ smu_get_message_name(smu, msg), index, param, ret);
WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0);
@@ -134,8 +134,8 @@ smu_v11_0_send_msg_with_param(struct smu_context *smu, uint16_t msg,
ret = smu_v11_0_wait_for_response(smu);
if (ret)
- pr_err("Failed to send message 0x%x, response 0x%x param 0x%x\n",
- index, ret, param);
+ pr_err("failed send message: %10s (%d) \tparam: 0x%08x response %#x\n",
+ smu_get_message_name(smu, msg), index, param, ret);
return ret;
}
--
2.22.0
More information about the amd-gfx
mailing list