[PATCH 1/3] drm/amdkfd: Fix gfx10 wave64 VGPR context restore

[Cornwall, Jay]

Copy/paste error, first 4 VGPRs are separated by 64 dwords (256 bytes).

Cc: Shaoyun Liu <shaoyun.liu at amd.com>
Signed-off-by: Jay Cornwall <jay.cornwall at amd.com>
---
 drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h         | 6 +++---
 drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm | 6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
index 2b3d701..c10e424 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler.h
@@ -982,9 +982,9 @@ static const uint32_t cwsr_trap_gfx10_hex[] = {
 	0x00000080, 0xbf0a6f7c,
 	0xbf85fff7, 0xbeff03c1,
 	0xe0304000, 0x725d0000,
-	0xe0304080, 0x725d0100,
-	0xe0304100, 0x725d0200,
-	0xe0304180, 0x725d0300,
+	0xe0304100, 0x725d0100,
+	0xe0304200, 0x725d0200,
+	0xe0304300, 0x725d0300,
 	0xb9782a05, 0x80788178,
 	0x907c9973, 0x877c817c,
 	0xbf06817c, 0xbf850002,
diff --git a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
index 261e054..be6f7d1 100644
--- a/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
+++ b/drivers/gpu/drm/amd/amdkfd/cwsr_trap_handler_gfx10.asm
@@ -747,9 +747,9 @@ L_RESTORE_SHARED_VGPR_WAVE64_LOOP:
 	/* VGPR restore on v0 */
 L_RESTORE_V0:
 	buffer_load_dword	v0, v0, s_restore_buf_rsrc0, s_restore_mem_offset_save slc:1 glc:1
-	buffer_load_dword	v1, v0, s_restore_buf_rsrc0, s_restore_mem_offset_save slc:1 glc:1 offset:128
-	buffer_load_dword	v2, v0, s_restore_buf_rsrc0, s_restore_mem_offset_save slc:1 glc:1 offset:128*2
-	buffer_load_dword	v3, v0, s_restore_buf_rsrc0, s_restore_mem_offset_save slc:1 glc:1 offset:128*3
+	buffer_load_dword	v1, v0, s_restore_buf_rsrc0, s_restore_mem_offset_save slc:1 glc:1 offset:256
+	buffer_load_dword	v2, v0, s_restore_buf_rsrc0, s_restore_mem_offset_save slc:1 glc:1 offset:256*2
+	buffer_load_dword	v3, v0, s_restore_buf_rsrc0, s_restore_mem_offset_save slc:1 glc:1 offset:256*3
 
 	/* restore SGPRs */
 	//will be 2+8+16*6
-- 
2.7.4