[PATCH 11/30] drm/amd/include: adjust base offset of SMUIO and THM for Arcturus
Alex Deucher
alexdeucher at gmail.com
Mon Jul 29 20:14:49 UTC 2019
From: Le Ma <le.ma at amd.com>
Arcturus has different _BASE_IDX value in some HWIP_offset.h. To make source
files like smu_v11_0.c and soc15.c that include HWIP_offset.h of Vega20
reusable for Arcturus, align this base offset with Vega20.
Signed-off-by: Le Ma <le.ma at amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
drivers/gpu/drm/amd/include/arct_ip_offset.h | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/include/arct_ip_offset.h b/drivers/gpu/drm/amd/include/arct_ip_offset.h
index 3211b3a96d68..a7791a9e1f90 100644
--- a/drivers/gpu/drm/amd/include/arct_ip_offset.h
+++ b/drivers/gpu/drm/amd/include/arct_ip_offset.h
@@ -196,17 +196,13 @@ static const struct IP_BASE SDMA7_BASE ={ { { { 0x00013800, 0x0001F40
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } } } };
-static const struct IP_BASE SMUIO_BASE ={ { { { 0x00012080, 0x00016800, 0x00016A00, 0x00401000, 0x00440000, 0 } },
- { { 0, 0, 0, 0, 0, 0 } },
- { { 0, 0, 0, 0, 0, 0 } },
+static const struct IP_BASE SMUIO_BASE ={ { { { 0x00016800, 0x00016A00, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } } } };
-static const struct IP_BASE THM_BASE ={ { { { 0x00012060, 0x00016600, 0x00400C00, 0, 0, 0 } },
- { { 0, 0, 0, 0, 0, 0 } },
- { { 0, 0, 0, 0, 0, 0 } },
+static const struct IP_BASE THM_BASE ={ { { { 0x00016600, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
{ { 0, 0, 0, 0, 0, 0 } },
--
2.20.1
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