[PATCH 198/459] drm/amdgpu/vcn2: don't access register when power gated

Alex Deucher alexdeucher at gmail.com
Mon Jun 17 19:30:41 UTC 2019


From: Jack Xiao <Jack.Xiao at amd.com>

It will cause bus hang to access register UVD_STATUS
when VCN is in the state of power gated.

Signed-off-by: Jack Xiao <Jack.Xiao at amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
Reviewed-by: Huang Rui <ray.huang at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 7609e63e59bc..d1e90209d088 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -277,7 +277,8 @@ static int vcn_v2_0_hw_fini(void *handle)
 	struct amdgpu_ring *ring = &adev->vcn.ring_dec;
 	int i;
 
-	if (RREG32_SOC15(VCN, 0, mmUVD_STATUS))
+	if (adev->vcn.cur_state != AMD_PG_STATE_GATE &&
+	    RREG32_SOC15(VCN, 0, mmUVD_STATUS))
 		vcn_v2_0_set_powergating_state(adev, AMD_PG_STATE_GATE);
 
 	ring->sched.ready = false;
-- 
2.20.1



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