[PATCH 262/459] drm/amdgpu: correct reference clock value on navi10

Alex Deucher alexdeucher at gmail.com
Mon Jun 17 19:30:29 UTC 2019


From: Tao Zhou <tao.zhou1 at amd.com>

remove the divisor 4

Signed-off-by: Tao Zhou <tao.zhou1 at amd.com>
Acked-by: Jack Xiao <Jack.Xiao at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/nv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index d1f8757abbeb..70d844d06e20 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -122,7 +122,7 @@ static u32 nv_get_config_memsize(struct amdgpu_device *adev)
 
 static u32 nv_get_xclk(struct amdgpu_device *adev)
 {
-	return adev->clock.spll.reference_freq / 4;
+	return adev->clock.spll.reference_freq;
 }
 
 
-- 
2.20.1



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