[PATCH] drm/amd/powerplay: apply Vega20 BACO workaround

Alex Deucher alexdeucher at gmail.com
Thu Mar 7 02:46:01 UTC 2019


On Wed, Mar 6, 2019 at 9:38 PM Evan Quan <evan.quan at amd.com> wrote:
>
> Applied vdci flush workaround for Vega20 BACO.
>
> Change-Id: Ia132ae30f826643bfba980402a92fbd0ae7a4236
> Signed-off-by: Evan Quan <evan.quan at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

Can we re-enable BACO with this fix?

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h           |  1 +
>  drivers/gpu/drm/amd/amdgpu/soc15.c            |  2 ++
>  .../gpu/drm/amd/powerplay/hwmgr/vega20_baco.c | 12 +++++++++++
>  .../gpu/drm/amd/powerplay/hwmgr/vega20_baco.h |  1 +
>  .../drm/amd/powerplay/hwmgr/vega20_hwmgr.c    | 11 +++++++++-
>  .../gpu/drm/amd/powerplay/inc/vega20_ppsmc.h  |  3 ++-
>  .../drm/amd/powerplay/smumgr/vega20_smumgr.c  | 20 +++++++++++++++++++
>  .../drm/amd/powerplay/smumgr/vega20_smumgr.h  |  1 +
>  8 files changed, 49 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 876486595d89..fe0f5653805b 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -981,6 +981,7 @@ struct amdgpu_device {
>
>         int asic_reset_res;
>         struct work_struct              xgmi_reset_work;
> +       bool                            in_baco_reset;
>  };
>
>  static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c
> index cc80f050cbf6..75a408a216b9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/soc15.c
> +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c
> @@ -452,6 +452,8 @@ static int soc15_asic_baco_reset(struct amdgpu_device *adev)
>
>         dev_info(adev->dev, "GPU BACO reset\n");
>
> +       adev->in_baco_reset = 1;
> +
>         return 0;
>  }
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.c
> index 5e8602a79b1c..df6ff9252401 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.c
> @@ -27,6 +27,7 @@
>  #include "vega20_inc.h"
>  #include "vega20_ppsmc.h"
>  #include "vega20_baco.h"
> +#include "vega20_smumgr.h"
>
>
>
> @@ -101,3 +102,14 @@ int vega20_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state)
>
>         return 0;
>  }
> +
> +int vega20_baco_apply_vdci_flush_workaround(struct pp_hwmgr *hwmgr)
> +{
> +       int ret = 0;
> +
> +       ret = vega20_set_pptable_driver_address(hwmgr);
> +       if (ret)
> +               return ret;
> +
> +       return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_BacoWorkAroundFlushVDCI);
> +}
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.h
> index 51c7f8392925..f06471e712dc 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.h
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_baco.h
> @@ -28,5 +28,6 @@
>  extern int vega20_baco_get_capability(struct pp_hwmgr *hwmgr, bool *cap);
>  extern int vega20_baco_get_state(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);
>  extern int vega20_baco_set_state(struct pp_hwmgr *hwmgr, enum BACO_STATE state);
> +extern int vega20_baco_apply_vdci_flush_workaround(struct pp_hwmgr *hwmgr);
>
>  #endif
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> index 9aa7bec1b5fe..664544e7fcdc 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> @@ -443,6 +443,7 @@ static int vega20_init_sclk_threshold(struct pp_hwmgr *hwmgr)
>
>  static int vega20_setup_asic_task(struct pp_hwmgr *hwmgr)
>  {
> +       struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
>         int ret = 0;
>
>         ret = vega20_init_sclk_threshold(hwmgr);
> @@ -450,7 +451,15 @@ static int vega20_setup_asic_task(struct pp_hwmgr *hwmgr)
>                         "Failed to init sclk threshold!",
>                         return ret);
>
> -       return 0;
> +       if (adev->in_baco_reset) {
> +               adev->in_baco_reset = 0;
> +
> +               ret = vega20_baco_apply_vdci_flush_workaround(hwmgr);
> +               if (ret)
> +                       pr_err("Failed to apply vega20 baco workaround!\n");
> +       }
> +
> +       return ret;
>  }
>
>  /*
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h b/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h
> index 4f63a736ea0e..a0883038f3c3 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/vega20_ppsmc.h
> @@ -119,7 +119,8 @@
>  #define PPSMC_MSG_PrepareMp1ForShutdown          0x5A
>  #define PPSMC_MSG_SetMGpuFanBoostLimitRpm        0x5D
>  #define PPSMC_MSG_GetAVFSVoltageByDpm            0x5F
> -#define PPSMC_Message_Count                      0x60
> +#define PPSMC_MSG_BacoWorkAroundFlushVDCI        0x60
> +#define PPSMC_Message_Count                      0x61
>
>  typedef uint32_t PPSMC_Result;
>  typedef uint32_t PPSMC_Msg;
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c
> index ba00744c3413..f301a73f6df1 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c
> @@ -367,6 +367,26 @@ static int vega20_set_tools_address(struct pp_hwmgr *hwmgr)
>         return ret;
>  }
>
> +int vega20_set_pptable_driver_address(struct pp_hwmgr *hwmgr)
> +{
> +       struct vega20_smumgr *priv =
> +                       (struct vega20_smumgr *)(hwmgr->smu_backend);
> +       int ret = 0;
> +
> +       PP_ASSERT_WITH_CODE((ret = vega20_send_msg_to_smc_with_parameter(hwmgr,
> +                       PPSMC_MSG_SetDriverDramAddrHigh,
> +                       upper_32_bits(priv->smu_tables.entry[TABLE_PPTABLE].mc_addr))) == 0,
> +                       "[SetPPtabeDriverAddress] Attempt to Set Dram Addr High Failed!",
> +                       return ret);
> +       PP_ASSERT_WITH_CODE((ret = vega20_send_msg_to_smc_with_parameter(hwmgr,
> +                       PPSMC_MSG_SetDriverDramAddrLow,
> +                       lower_32_bits(priv->smu_tables.entry[TABLE_PPTABLE].mc_addr))) == 0,
> +                       "[SetPPtabeDriverAddress] Attempt to Set Dram Addr Low Failed!",
> +                       return ret);
> +
> +       return ret;
> +}
> +
>  static int vega20_smu_init(struct pp_hwmgr *hwmgr)
>  {
>         struct vega20_smumgr *priv;
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.h b/drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.h
> index 77349c3f0162..ec953ab13e87 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.h
> @@ -55,6 +55,7 @@ int vega20_set_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
>                 uint8_t *table, uint16_t workload_type);
>  int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
>                 uint8_t *table, uint16_t workload_type);
> +int vega20_set_pptable_driver_address(struct pp_hwmgr *hwmgr);
>
>  #endif
>
> --
> 2.21.0
>
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