[PATCH] drm/amdgpu: Fix S3 test issue

[Alex Deucher]

On Wed, May 8, 2019 at 4:47 PM Zhu, James <James.Zhu at amd.com> wrote:
>
> During S3 test, when system wake up and resume, ras interface
> is already allocated. Move workaround before ras jumps to resume
> step in gfx_v9_0_ecc_late_init, and make sure workaround applied
> during resume. Also remove unused mmGB_EDC_MODE clearing.
>
> Signed-off-by: James Zhu <James.Zhu at amd.com>

Acked-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 14 +++++---------
>  1 file changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 14e671d..34a01f2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -3630,7 +3630,6 @@ static int gfx_v9_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
>         struct amdgpu_ib ib;
>         struct dma_fence *f = NULL;
>         int r, i, j;
> -       u32 tmp;
>         unsigned total_size, vgpr_offset, sgpr_offset;
>         u64 gpu_addr;
>
> @@ -3642,9 +3641,6 @@ static int gfx_v9_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
>         if (!ring->sched.ready)
>                 return 0;
>
> -       tmp = RREG32_SOC15(GC, 0, mmGB_EDC_MODE);
> -       WREG32_SOC15(GC, 0, mmGB_EDC_MODE, 0);
> -
>         total_size =
>                 ((ARRAY_SIZE(vgpr_init_regs) * 3) + 4 + 5 + 2) * 4;
>         total_size +=
> @@ -3810,6 +3806,11 @@ static int gfx_v9_0_ecc_late_init(void *handle)
>                 return 0;
>         }
>
> +       /* requires IBs so do in late init after IB pool is initialized */
> +       r = gfx_v9_0_do_edc_gpr_workarounds(adev);
> +       if (r)
> +               return r;
> +
>         if (*ras_if)
>                 goto resume;
>
> @@ -3817,11 +3818,6 @@ static int gfx_v9_0_ecc_late_init(void *handle)
>         if (!*ras_if)
>                 return -ENOMEM;
>
> -       /* requires IBs so do in late init after IB pool is initialized */
> -       r = gfx_v9_0_do_edc_gpr_workarounds(adev);
> -       if (r)
> -               return r;
> -
>         **ras_if = ras_block;
>
>         r = amdgpu_ras_feature_enable_on_boot(adev, *ras_if, 1);
> --
> 2.7.4
>
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