[PATCH] drm/amdgpu/sriov: Need to initialize the HDP_NONSURFACE_BAStE
Christian König
ckoenig.leichtzumerken at gmail.com
Tue May 14 11:04:52 UTC 2019
Am 14.05.19 um 12:59 schrieb Tiecheng Zhou:
> it requires to initialize HDP_NONSURFACE_BASE, so as to avoid
> using the value left by a previous VM under sriov scenario.
>
> v2: it should not hurt baremetal, generalize it for both sriov
> and baremetal
>
> Signed-off-by: Emily Deng <Emily.Deng at amd.com>
> Signed-off-by: Tiecheng Zhou <Tiecheng.Zhou at amd.com>
Reviewed-by: Christian König <christian.koenig at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index be729e7..c221570 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1181,6 +1181,9 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
> tmp = RREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL);
> WREG32_SOC15(HDP, 0, mmHDP_HOST_PATH_CNTL, tmp);
>
> + WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8));
> + WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40));
> +
> /* After HDP is initialized, flush HDP.*/
> adev->nbio_funcs->hdp_flush(adev, NULL);
>
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