[PATCH] drm/amdgpu: use div64_ul for 32-bit compatibility v1
Alex Deucher
alexdeucher at gmail.com
Fri May 17 19:22:14 UTC 2019
On Fri, May 17, 2019 at 2:34 PM Abramov, Slava <Slava.Abramov at amd.com> wrote:
>
> v1: replace casting to unsigned long with div64_ul
>
> Change-Id: Ia48671ed0756bb73c7b4760a800bcb6f600cbef2
> Signed-off-by: Slava Abramov <slava.abramov at amd.com>
Acked-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index da1dc40b9b14..d5719b0fb82c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -764,8 +764,8 @@ static ssize_t amdgpu_ras_sysfs_badpages_read(struct file *f,
> struct amdgpu_device *adev = con->adev;
> const unsigned int element_size =
> sizeof("0xabcdabcd : 0x12345678 : R\n") - 1;
> - unsigned int start = (ppos + element_size - 1) / element_size;
> - unsigned int end = (ppos + count - 1) / element_size;
> + unsigned int start = div64_ul(ppos + element_size - 1, element_size);
> + unsigned int end = div64_ul(ppos + count - 1, element_size);
> ssize_t s = 0;
> struct ras_badpage *bps = NULL;
> unsigned int bps_count = 0;
> --
> 2.17.1
>
>
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