[PATCH] drm/amd/display: Don't load DMCU for Raven 1 (v2)

Alex Deucher alexdeucher at gmail.com
Fri May 24 16:20:03 UTC 2019


On Fri, May 24, 2019 at 12:09 PM Mike Lothian <mike at fireburn.co.uk> wrote:
>
> Hi
>
> Curious to know what this means for folk that have newer Raven1 boards
> that didn't have issues loading the firmware

You won't get ABM I think.  ABM is the automatic backlight management.

Alex

>
> Cheers
>
> Mike
>
> On Fri, 24 May 2019 at 16:34, Alex Deucher <alexdeucher at gmail.com> wrote:
> >
> > From: Harry Wentland <harry.wentland at amd.com>
> >
> > [WHY]
> > Some early Raven boards had a bad SBIOS that doesn't play nicely with
> > the DMCU FW. We thought the issues were fixed by ignoring errors on DMCU
> > load but that doesn't seem to be the case. We've still seen reports of
> > users unable to boot their systems at all.
> >
> > [HOW]
> > Disable DMCU load on Raven 1. Only load it for Raven 2 and Picasso.
> >
> > v2: Fix ifdef (Alex)
> >
> > Signed-off-by: Harry Wentland <harry.wentland at amd.com>
> > Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>
> > Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
> > Cc: stable at vger.kernel.org
> > ---
> >  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12 ++++++++++--
> >  1 file changed, 10 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > index 995f9df66142..bcb1a93c0b4c 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > @@ -29,6 +29,7 @@
> >  #include "dm_services_types.h"
> >  #include "dc.h"
> >  #include "dc/inc/core_types.h"
> > +#include "dal_asic_id.h"
> >
> >  #include "vid.h"
> >  #include "amdgpu.h"
> > @@ -640,7 +641,7 @@ static void amdgpu_dm_fini(struct amdgpu_device *adev)
> >
> >  static int load_dmcu_fw(struct amdgpu_device *adev)
> >  {
> > -       const char *fw_name_dmcu;
> > +       const char *fw_name_dmcu = NULL;
> >         int r;
> >         const struct dmcu_firmware_header_v1_0 *hdr;
> >
> > @@ -663,7 +664,14 @@ static int load_dmcu_fw(struct amdgpu_device *adev)
> >         case CHIP_VEGA20:
> >                 return 0;
> >         case CHIP_RAVEN:
> > -               fw_name_dmcu = FIRMWARE_RAVEN_DMCU;
> > +#if defined(CONFIG_DRM_AMD_DC_DCN1_01)
> > +               if (ASICREV_IS_PICASSO(adev->external_rev_id))
> > +                       fw_name_dmcu = FIRMWARE_RAVEN_DMCU;
> > +               else if (ASICREV_IS_RAVEN2(adev->external_rev_id))
> > +                       fw_name_dmcu = FIRMWARE_RAVEN_DMCU;
> > +               else
> > +#endif
> > +                       return 0;
> >                 break;
> >         default:
> >                 DRM_ERROR("Unsupported ASIC type: 0x%X\n", adev->asic_type);
> > --
> > 2.20.1
> >
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/amd-gfx


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