[PATCH] drm/amdgpu: disallow direct upload save restore list from gfx driver

Li, Candice Candice.Li at amd.com
Tue Nov 5 03:28:06 UTC 2019


Reviewed-by: Candice Li <Candice.Li at amd.com>



Thanks,
Candice Li

-----Original Message-----
From: Zhang, Hawking 
Sent: Monday, November 04, 2019 6:18 PM
To: amd-gfx at lists.freedesktop.org; Clements John <Clements.John at amd.com>; Li, Candice <Candice.Li at amd.com>
Cc: Zhang, Hawking <Hawking.Zhang at amd.com>
Subject: [PATCH] drm/amdgpu: disallow direct upload save restore list from gfx driver

Direct uploading save/restore list via mmio register writes breaks the security policy. Instead, the driver should pass s&r list to psp.

For all the ASICs that use rlc v2_1 headers, the driver actually upload s&r list twice, in non-psp ucode front door loading phase and gfx pg initialization phase.
The latter is not allowed.

VG12 is the only exception where the driver still keeps legacy approach for S&R list uploading. In theory, this can be elimnated if we have valid srcntl ucode for VG12.

Change-Id: I8cc8e0126f746aae43b9114e05bc111ee7b23531
Signed-off-by: Hawking Zhang <Hawking.Zhang at amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 0525fc6..d14c4d7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2725,7 +2725,8 @@ static void gfx_v9_0_init_pg(struct amdgpu_device *adev)
 	 * And it's needed by gfxoff feature.
 	 */
 	if (adev->gfx.rlc.is_rlc_v2_1) {
-		gfx_v9_1_init_rlc_save_restore_list(adev);
+		if (adev->asic_type == CHIP_VEGA12)
+			gfx_v9_1_init_rlc_save_restore_list(adev);
 		gfx_v9_0_enable_save_restore_machine(adev);
 	}
 
--
2.7.4



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