[PATCH] drm/amd/powerplay: avoid DPM reenable process on Navi1x ASICs V2

[Feng, Kenneth]

Reviewed-by: Kenneth Feng <kenneth.feng at amd.com>



-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Evan Quan
Sent: Tuesday, November 12, 2019 9:47 AM
To: amd-gfx at lists.freedesktop.org
Cc: alexdeucher at gmail.com; Matt Coffin <mcoffin13 at gmail.com>; Quan, Evan <Evan.Quan at amd.com>
Subject: [PATCH] drm/amd/powerplay: avoid DPM reenable process on Navi1x ASICs V2

[CAUTION: External Email]

Otherwise, without RLC reinitialization, the DPM reenablement will fail. That affects the custom pptable uploading.

V2: setting/clearing uploading_custom_pp_table in
    smu_sys_set_pp_table()

Change-Id: I6fe2ed5ce23f2a5b66f371c0b6d1f924837e5af6
Reported-by: Matt Coffin <mcoffin13 at gmail.com>
Signed-off-by: Evan Quan <evan.quan at amd.com>
Tested-by: Matt Coffin <mcoffin13 at gmail.com>
---
 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c    | 31 ++++++++++++++++---
 .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h    |  1 +
 2 files changed, 28 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 76a4154b3be2..54c21f5a1861 100644
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -591,10 +591,18 @@ int smu_sys_set_pp_table(struct smu_context *smu,  void *buf, size_t size)
        smu_table->power_play_table = smu_table->hardcode_pptable;
        smu_table->power_play_table_size = size;

+       /*
+        * Special hw_fini action(for Navi1x, the DPMs disablement will be
+        * skipped) may be needed for custom pptable uploading.
+        */
+       smu->uploading_custom_pp_table = true;
+
        ret = smu_reset(smu);
        if (ret)
                pr_info("smu reset failed, ret = %d\n", ret);

+       smu->uploading_custom_pp_table = false;
+
 failed:
        mutex_unlock(&smu->mutex);
        return ret;
@@ -1293,10 +1301,25 @@ static int smu_hw_fini(void *handle)
                return ret;
        }

-       ret = smu_stop_dpms(smu);
-       if (ret) {
-               pr_warn("Fail to stop Dpms!\n");
-               return ret;
+       /*
+        * For custom pptable uploading, skip the DPM features
+        * disable process on Navi1x ASICs.
+        *   - As the gfx related features are under control of
+        *     RLC on those ASICs. RLC reinitialization will be
+        *     needed to reenable them. That will cost much more
+        *     efforts.
+        *
+        *   - SMU firmware can handle the DPM reenablement
+        *     properly.
+        */
+       if (!smu->uploading_custom_pp_table ||
+           !((adev->asic_type >= CHIP_NAVI10) &&
+             (adev->asic_type <= CHIP_NAVI12))) {
+               ret = smu_stop_dpms(smu);
+               if (ret) {
+                       pr_warn("Fail to stop Dpms!\n");
+                       return ret;
+               }
        }

        kfree(table_context->driver_pptable);
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index 8120e7587585..215841f5fb93 100644
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -391,6 +391,7 @@ struct smu_context

        uint32_t smc_if_version;

+       bool uploading_custom_pp_table;
 };

 struct i2c_adapter;
--
2.24.0

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