[PATCH] drm/amd/include: add aux timeout vega registers

Liu, Zhan Zhan.Liu at amd.com
Fri Oct 4 19:48:53 UTC 2019


Looks good to me.

Reviewed-by: Zhan Liu <zhan.liu at amd.com>

-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Roman.Li at amd.com
Sent: 2019/October/04, Friday 3:45 PM
To: amd-gfx at lists.freedesktop.org
Cc: Berthe, Abdoulaye <Abdoulaye.Berthe at amd.com>; Liu, Zhan <Zhan.Liu at amd.com>; Li, Roman <Roman.Li at amd.com>; Wentland, Harry <Harry.Wentland at amd.com>; Deucher, Alexander <Alexander.Deucher at amd.com>; Lakha, Bhawanpreet <Bhawanpreet.Lakha at amd.com>
Subject: [PATCH] drm/amd/include: add aux timeout vega registers

From: Roman Li <Roman.Li at amd.com>

DC needs them to support configurable aux timeout on vega

Signed-off-by: Roman Li <Roman.Li at amd.com>
---
 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h
index bcd190a..832d7b2 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h
@@ -35549,7 +35549,11 @@
 #define DP_AUX0_AUX_DPHY_RX_CONTROL0__AUX_RX_DETECTION_THRESHOLD_MASK                                         0x70000000L
 //DP_AUX0_AUX_DPHY_RX_CONTROL1
 #define DP_AUX0_AUX_DPHY_RX_CONTROL1__AUX_RX_PRECHARGE_SKIP__SHIFT                                            0x0
+#define DP_AUX0_AUX_DPHY_RX_CONTROL1__AUX_RX_TIMEOUT_LEN__SHIFT                                               0x8
+#define DP_AUX0_AUX_DPHY_RX_CONTROL1__AUX_RX_TIMEOUT_LEN_MUL__SHIFT                                           0xf
 #define DP_AUX0_AUX_DPHY_RX_CONTROL1__AUX_RX_PRECHARGE_SKIP_MASK                                              0x000000FFL
+#define DP_AUX0_AUX_DPHY_RX_CONTROL1__AUX_RX_TIMEOUT_LEN_MASK                                                 0x00007F00L
+#define DP_AUX0_AUX_DPHY_RX_CONTROL1__AUX_RX_TIMEOUT_LEN_MUL_MASK                                             0x00018000L
 //DP_AUX0_AUX_DPHY_TX_STATUS
 #define DP_AUX0_AUX_DPHY_TX_STATUS__AUX_TX_ACTIVE__SHIFT                                                      0x0
 #define DP_AUX0_AUX_DPHY_TX_STATUS__AUX_TX_STATE__SHIFT                                                       0x4
-- 
2.7.4

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