[PATCH 2/2] drm/amdgpu: Enable gfx cache probing on HDP write for arcturus

Christian König ckoenig.leichtzumerken at gmail.com
Tue Oct 8 08:00:02 UTC 2019


Am 07.10.19 um 22:34 schrieb Zeng, Oak:
> This allows gfx cache to be probed and invalidated (for none-dirty cache lines)
> on a HDP write (from either another GPU or CPU). This should work only for the
> memory mapped as RW memory type newly added for arcturus, to achieve some cache
> coherence b/t multiple memory clients.
>
> Change-Id: I5c9a6a25d88cd75c71c88822123e0d4c067aa3f8
> Signed-off-by: Oak Zeng <Oak.Zeng at amd.com>

Acked-by: Christian König <christian.koenig at amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index c7e07f1..6e45ebb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1192,6 +1192,9 @@ static int gmc_v9_0_hw_init(void *handle)
>   		/* TODO for renoir */
>   		mmhub_v1_0_update_power_gating(adev, true);
>   		break;
> +	case CHIP_ARCTURUS:
> +		WREG32_FIELD15(HDP, 0, HDP_MMHUB_CNTL, HDP_MMHUB_GCC, 1);
> +		break;
>   	default:
>   		break;
>   	}



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