[PATCH] drm/amdgpu: Fix SDMA hang when performing VKexample test
Liu, Aaron
Aaron.Liu at amd.com
Wed Oct 23 07:27:31 UTC 2019
Reviewed-by: Aaron Liu <aaron.liu at amd.com>
BR,
Aaron Liu
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of chen
> gong
> Sent: Wednesday, October 23, 2019 2:51 PM
> To: amd-gfx at lists.freedesktop.org
> Cc: Gong, Curry <Curry.Gong at amd.com>
> Subject: [PATCH] drm/amdgpu: Fix SDMA hang when performing VKexample
> test
>
> VKexample test hang during Occlusion/SDMA/Varia runs.
> Clear XNACK_WATERMK in reg SDMA0_UTCL1_WATERMK to fix this issue.
>
> Signed-off-by: chen gong <curry.gong at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 63a3792..45bd538 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -254,6 +254,7 @@ static const struct soc15_reg_golden
> golden_settings_sdma_4_3[] = {
> SOC15_REG_GOLDEN_VALUE(SDMA0, 0,
> mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
> SOC15_REG_GOLDEN_VALUE(SDMA0, 0,
> mmSDMA0_RLC1_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
> SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_UTCL1_PAGE,
> 0x000003ff, 0x000003c0),
> + SOC15_REG_GOLDEN_VALUE(SDMA0, 0,
> mmSDMA0_UTCL1_WATERMK, 0xfc000000, 0x00000000)
> };
>
> static u32 sdma_v4_0_get_reg_offset(struct amdgpu_device *adev,
> --
> 2.7.4
>
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