[PATCH] drm/amd/powerplay: support xgmi pstate setting on powerplay routine
Alex Deucher
alexdeucher at gmail.com
Thu Oct 31 01:55:19 UTC 2019
On Wed, Oct 30, 2019 at 9:50 PM Quan, Evan <Evan.Quan at amd.com> wrote:
>
> Add xgmi pstate setting on powerplay routine.
>
> Change-Id: If1a49aa14c16f133e43ac1298c6b14eaeb44d79d
> Signed-off-by: Evan Quan <evan.quan at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 5 +++++
> drivers/gpu/drm/amd/include/kgd_pp_interface.h | 4 ++++
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 18 ++++++++++++++++++
> drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 3 +++
> .../gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 15 +++++++++++++++
> drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 +
> drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 5 +----
> 7 files changed, 47 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> index 00371713c671..167d9fbd2c4f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
> @@ -285,6 +285,11 @@ int amdgpu_xgmi_set_pstate(struct amdgpu_device *adev, int pstate)
>
> if (is_support_sw_smu_xgmi(adev))
> ret = smu_set_xgmi_pstate(&adev->smu, pstate);
> + else if (adev->powerplay.pp_funcs &&
> + adev->powerplay.pp_funcs->set_xgmi_pstate)
> + ret = adev->powerplay.pp_funcs->set_xgmi_pstate(adev->powerplay.pp_handle,
> + pstate);
> +
> if (ret)
> dev_err(adev->dev,
> "XGMI: Set pstate failure on device %llx, hive %llx, ret %d",
> diff --git a/drivers/gpu/drm/amd/include/kgd_pp_interface.h b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
> index 5902f80d1fce..a7f92d0b3a90 100644
> --- a/drivers/gpu/drm/amd/include/kgd_pp_interface.h
> +++ b/drivers/gpu/drm/amd/include/kgd_pp_interface.h
> @@ -220,6 +220,9 @@ enum pp_df_cstate {
> ((group) << PP_GROUP_SHIFT | (block) << PP_BLOCK_SHIFT | \
> (support) << PP_STATE_SUPPORT_SHIFT | (state) << PP_STATE_SHIFT)
>
> +#define XGMI_MODE_PSTATE_D3 0
> +#define XGMI_MODE_PSTATE_D0 1
> +
> struct seq_file;
> enum amd_pp_clock_type;
> struct amd_pp_simple_clock_info;
> @@ -318,6 +321,7 @@ struct amd_pm_funcs {
> int (*set_ppfeature_status)(void *handle, uint64_t ppfeature_masks);
> int (*asic_reset_mode_2)(void *handle);
> int (*set_df_cstate)(void *handle, enum pp_df_cstate state);
> + int (*set_xgmi_pstate)(void *handle, uint32_t pstate);
> };
>
> #endif
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index f4ff15378e61..031447675203 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -1566,6 +1566,23 @@ static int pp_set_df_cstate(void *handle, enum pp_df_cstate state)
> return 0;
> }
>
> +static int pp_set_xgmi_pstate(void *handle, uint32_t pstate)
> +{
> + struct pp_hwmgr *hwmgr = handle;
> +
> + if (!hwmgr)
> + return -EINVAL;
> +
> + if (!hwmgr->pm_en || !hwmgr->hwmgr_func->set_xgmi_pstate)
> + return 0;
> +
> + mutex_lock(&hwmgr->smu_lock);
> + hwmgr->hwmgr_func->set_xgmi_pstate(hwmgr, pstate);
> + mutex_unlock(&hwmgr->smu_lock);
> +
> + return 0;
> +}
> +
> static const struct amd_pm_funcs pp_dpm_funcs = {
> .load_firmware = pp_dpm_load_fw,
> .wait_for_fw_loading_complete = pp_dpm_fw_loading_complete,
> @@ -1625,4 +1642,5 @@ static const struct amd_pm_funcs pp_dpm_funcs = {
> .asic_reset_mode_2 = pp_asic_reset_mode_2,
> .smu_i2c_bus_access = pp_smu_i2c_bus_access,
> .set_df_cstate = pp_set_df_cstate,
> + .set_xgmi_pstate = pp_set_xgmi_pstate,
> };
> diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> index 3ce01e1994fc..ca2dbef8670c 100644
> --- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
> @@ -529,6 +529,9 @@ bool is_support_sw_smu_xgmi(struct amdgpu_device *adev)
> if (amdgpu_dpm != 1)
> return false;
>
> + if (!is_support_sw_smu(adev))
> + return false;
> +
> if (adev->asic_type == CHIP_VEGA20)
> return true;
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> index 9295bd90b792..5bcf0d684151 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> @@ -4176,6 +4176,20 @@ static int vega20_set_df_cstate(struct pp_hwmgr *hwmgr,
> return ret;
> }
>
> +static int vega20_set_xgmi_pstate(struct pp_hwmgr *hwmgr,
> + uint32_t pstate)
> +{
> + int ret;
> +
> + ret = smum_send_msg_to_smc_with_parameter(hwmgr,
> + PPSMC_MSG_SetXgmiMode,
> + pstate ? XGMI_MODE_PSTATE_D0 : XGMI_MODE_PSTATE_D3);
> + if (ret)
> + pr_err("SetXgmiPstate failed!\n");
> +
> + return ret;
> +}
> +
> static const struct pp_hwmgr_func vega20_hwmgr_funcs = {
> /* init/fini related */
> .backend_init = vega20_hwmgr_backend_init,
> @@ -4245,6 +4259,7 @@ static const struct pp_hwmgr_func vega20_hwmgr_funcs = {
> .set_mp1_state = vega20_set_mp1_state,
> .smu_i2c_bus_access = vega20_smu_i2c_bus_access,
> .set_df_cstate = vega20_set_df_cstate,
> + .set_xgmi_pstate = vega20_set_xgmi_pstate,
> };
>
> int vega20_hwmgr_init(struct pp_hwmgr *hwmgr)
> diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> index bd8c922dfd3e..40403bc76f1b 100644
> --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
> @@ -356,6 +356,7 @@ struct pp_hwmgr_func {
> int (*asic_reset)(struct pp_hwmgr *hwmgr, enum SMU_ASIC_RESET_MODE mode);
> int (*smu_i2c_bus_access)(struct pp_hwmgr *hwmgr, bool aquire);
> int (*set_df_cstate)(struct pp_hwmgr *hwmgr, enum pp_df_cstate state);
> + int (*set_xgmi_pstate)(struct pp_hwmgr *hwmgr, uint32_t pstate);
> };
>
> struct pp_table_func {
> diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> index 7e882999abad..5877857760be 100644
> --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
> @@ -1463,16 +1463,13 @@ int smu_v11_0_set_fan_speed_rpm(struct smu_context *smu,
> return ret;
> }
>
> -#define XGMI_STATE_D0 1
> -#define XGMI_STATE_D3 0
> -
> int smu_v11_0_set_xgmi_pstate(struct smu_context *smu,
> uint32_t pstate)
> {
> int ret = 0;
> ret = smu_send_smc_msg_with_param(smu,
> SMU_MSG_SetXgmiMode,
> - pstate ? XGMI_STATE_D0 : XGMI_STATE_D3);
> + pstate ? XGMI_MODE_PSTATE_D0 : XGMI_MODE_PSTATE_D3);
> return ret;
> }
>
> --
> 2.23.0
>
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