[PATCH 2/3] drm/amdgpu: reserve at least 4MB of VRAM for page tables v2

Kuehling, Felix Felix.Kuehling at amd.com
Tue Sep 3 20:55:08 UTC 2019


On 2019-09-03 5:09 a.m., Christian König wrote:
> This hopefully helps reduce the contention for page tables.
>
> v2: adjust maximum reported VRAM size as well
>
> Signed-off-by: Christian König <christian.koenig at amd.com>

I'll need to do something similar (and also take the vram_pin_size into 
account) in amdgpu_amdkfd_reserve_mem_limit. It doesn't even account for 
the vram_pin_size at the moment, which I should fix too. Otherwise this 
commit looks good to me.

Reviewed-by: Felix Kuehling <Felix.Kuehling at amd.com>


> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c      | 18 ++++++++++++------
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h       |  3 +++
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c |  9 +++++++--
>   3 files changed, 22 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 6cf61e01041f..5bc20d84351d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -616,9 +616,12 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
>   		struct drm_amdgpu_info_vram_gtt vram_gtt;
>   
>   		vram_gtt.vram_size = adev->gmc.real_vram_size -
> -			atomic64_read(&adev->vram_pin_size);
> -		vram_gtt.vram_cpu_accessible_size = adev->gmc.visible_vram_size -
> -			atomic64_read(&adev->visible_pin_size);
> +			atomic64_read(&adev->vram_pin_size) -
> +			AMDGPU_VM_RESERVED_VRAM;
> +		vram_gtt.vram_cpu_accessible_size =
> +			min(adev->gmc.visible_vram_size -
> +			    atomic64_read(&adev->visible_pin_size),
> +			    vram_gtt.vram_size);
>   		vram_gtt.gtt_size = adev->mman.bdev.man[TTM_PL_TT].size;
>   		vram_gtt.gtt_size *= PAGE_SIZE;
>   		vram_gtt.gtt_size -= atomic64_read(&adev->gart_pin_size);
> @@ -631,15 +634,18 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
>   		memset(&mem, 0, sizeof(mem));
>   		mem.vram.total_heap_size = adev->gmc.real_vram_size;
>   		mem.vram.usable_heap_size = adev->gmc.real_vram_size -
> -			atomic64_read(&adev->vram_pin_size);
> +			atomic64_read(&adev->vram_pin_size) -
> +			AMDGPU_VM_RESERVED_VRAM;
>   		mem.vram.heap_usage =
>   			amdgpu_vram_mgr_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
>   		mem.vram.max_allocation = mem.vram.usable_heap_size * 3 / 4;
>   
>   		mem.cpu_accessible_vram.total_heap_size =
>   			adev->gmc.visible_vram_size;
> -		mem.cpu_accessible_vram.usable_heap_size = adev->gmc.visible_vram_size -
> -			atomic64_read(&adev->visible_pin_size);
> +		mem.cpu_accessible_vram.usable_heap_size =
> +			min(adev->gmc.visible_vram_size -
> +			    atomic64_read(&adev->visible_pin_size),
> +			    mem.vram.usable_heap_size);
>   		mem.cpu_accessible_vram.heap_usage =
>   			amdgpu_vram_mgr_vis_usage(&adev->mman.bdev.man[TTM_PL_VRAM]);
>   		mem.cpu_accessible_vram.max_allocation =
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> index 2eda3a8c330d..3352a87b822e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
> @@ -99,6 +99,9 @@ struct amdgpu_bo_list_entry;
>   #define AMDGPU_VM_FAULT_STOP_FIRST	1
>   #define AMDGPU_VM_FAULT_STOP_ALWAYS	2
>   
> +/* Reserve 4MB VRAM for page tables */
> +#define AMDGPU_VM_RESERVED_VRAM		(4ULL << 20)
> +
>   /* max number of VMHUB */
>   #define AMDGPU_MAX_VMHUBS			3
>   #define AMDGPU_GFXHUB_0				0
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> index 1150e34bc28f..59440f71d304 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
> @@ -24,6 +24,7 @@
>   
>   #include <drm/drmP.h>
>   #include "amdgpu.h"
> +#include "amdgpu_vm.h"
>   
>   struct amdgpu_vram_mgr {
>   	struct drm_mm mm;
> @@ -276,7 +277,7 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man,
>   	struct drm_mm_node *nodes;
>   	enum drm_mm_insert_mode mode;
>   	unsigned long lpfn, num_nodes, pages_per_node, pages_left;
> -	uint64_t vis_usage = 0, mem_bytes;
> +	uint64_t vis_usage = 0, mem_bytes, max_bytes;
>   	unsigned i;
>   	int r;
>   
> @@ -284,9 +285,13 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man,
>   	if (!lpfn)
>   		lpfn = man->size;
>   
> +	max_bytes = adev->gmc.mc_vram_size;
> +	if (tbo->type != ttm_bo_type_kernel)
> +		max_bytes -= AMDGPU_VM_RESERVED_VRAM;
> +
>   	/* bail out quickly if there's likely not enough VRAM for this BO */
>   	mem_bytes = (u64)mem->num_pages << PAGE_SHIFT;
> -	if (atomic64_add_return(mem_bytes, &mgr->usage) > adev->gmc.mc_vram_size) {
> +	if (atomic64_add_return(mem_bytes, &mgr->usage) > max_bytes) {
>   		atomic64_sub(mem_bytes, &mgr->usage);
>   		mem->mm_node = NULL;
>   		return 0;


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