[PATCH] drm/amd/display: Add stereo mux and dig programming calls for dcn21

[Kazlauskas, Nicholas]

On 2019-09-04 5:43 p.m., Roman.Li at amd.com wrote:
> From: Roman Li <Roman.Li at amd.com>
> 
> [Why]
> The earlier patch "Hook up calls to do stereo mux and dig programming..."
> doesn't include update for dcn21.
> 
> [How]
> Align dcn21 gpio settings with updated stereo control interface.
> 
> Signed-off-by: Roman Li <Roman.Li at amd.com>

The patch itself looks good but the commit description doesn't actually 
describe what's being done here - this doesn't hook up programming 
calls, it just fills the dcn21 gpio generic registers that were 
previously missing.

Nicholas Kazlauskas

> ---
>   .../amd/display/dc/gpio/dcn21/hw_factory_dcn21.c   | 38 ++++++++++++++++++++--
>   .../amd/display/dc/gpio/dcn21/hw_translate_dcn21.c |  3 +-
>   2 files changed, 36 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c b/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
> index 34485d9..8572678 100644
> --- a/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
> +++ b/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_factory_dcn21.c
> @@ -35,12 +35,10 @@
>   
>   #include "hw_factory_dcn21.h"
>   
> -
>   #include "dcn/dcn_2_1_0_offset.h"
>   #include "dcn/dcn_2_1_0_sh_mask.h"
>   #include "renoir_ip_offset.h"
>   
> -
>   #include "reg_helper.h"
>   #include "../hpd_regs.h"
>   /* begin *********************
> @@ -136,6 +134,39 @@ static const struct ddc_sh_mask ddc_mask[] = {
>   	DDC_MASK_SH_LIST_DCN2(_MASK, 6)
>   };
>   
> +#include "../generic_regs.h"
> +
> +/* set field name */
> +#define SF_GENERIC(reg_name, field_name, post_fix)\
> +	.field_name = reg_name ## __ ## field_name ## post_fix
> +
> +#define generic_regs(id) \
> +{\
> +	GENERIC_REG_LIST(id)\
> +}
> +
> +static const struct generic_registers generic_regs[] = {
> +	generic_regs(A),
> +};
> +
> +static const struct generic_sh_mask generic_shift[] = {
> +	GENERIC_MASK_SH_LIST(__SHIFT, A),
> +};
> +
> +static const struct generic_sh_mask generic_mask[] = {
> +	GENERIC_MASK_SH_LIST(_MASK, A),
> +};
> +
> +static void define_generic_registers(struct hw_gpio_pin *pin, uint32_t en)
> +{
> +	struct hw_generic *generic = HW_GENERIC_FROM_BASE(pin);
> +
> +	generic->regs = &generic_regs[en];
> +	generic->shifts = &generic_shift[en];
> +	generic->masks = &generic_mask[en];
> +	generic->base.regs = &generic_regs[en].gpio;
> +}
> +
>   static void define_ddc_registers(
>   		struct hw_gpio_pin *pin,
>   		uint32_t en)
> @@ -181,7 +212,8 @@ static const struct hw_factory_funcs funcs = {
>   	.get_hpd_pin = dal_hw_hpd_get_pin,
>   	.get_generic_pin = dal_hw_generic_get_pin,
>   	.define_hpd_registers = define_hpd_registers,
> -	.define_ddc_registers = define_ddc_registers
> +	.define_ddc_registers = define_ddc_registers,
> +	.define_generic_registers = define_generic_registers
>   };
>   /*
>    * dal_hw_factory_dcn10_init
> diff --git a/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c b/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c
> index ad7c437..fbb58fb 100644
> --- a/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c
> +++ b/drivers/gpu/drm/amd/display/dc/gpio/dcn21/hw_translate_dcn21.c
> @@ -58,7 +58,6 @@
>   #define SF_HPD(reg_name, field_name, post_fix)\
>   	.field_name = reg_name ## __ ## field_name ## post_fix
>   
> -
>   /* macros to expend register list macro defined in HW object header file
>    * end *********************/
>   
> @@ -71,7 +70,7 @@ static bool offset_to_id(
>   {
>   	switch (offset) {
>   	/* GENERIC */
> -	case REG(DC_GENERICA):
> +	case REG(DC_GPIO_GENERIC_A):
>   		*id = GPIO_ID_GENERIC;
>   		switch (mask) {
>   		case DC_GPIO_GENERIC_A__DC_GPIO_GENERICA_A_MASK:
>