[PATCH 1/1] drm/amdgpu: Disable retry faults in VMID0
Huang, Ray
Ray.Huang at amd.com
Thu Sep 5 18:01:17 UTC 2019
On Thu, Sep 05, 2019 at 07:31:11AM +0800, Kuehling, Felix wrote:
> There is no point retrying page faults in VMID0. Those faults are
> always fatal.
>
> Signed-off-by: Felix Kuehling <Felix.Kuehling at amd.com>
Thanks! I have verified it in my platform.
Reviewed-and-Tested-by: Huang Rui <ray.huang at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 2 ++
> 5 files changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> index 6ce37ce77d14..9ec4297e61e5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
> @@ -178,6 +178,8 @@ static void gfxhub_v1_0_enable_system_domain(struct amdgpu_device *adev)
> tmp = RREG32_SOC15(GC, 0, mmVM_CONTEXT0_CNTL);
> tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1);
> tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0);
> + tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL,
> + RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
> WREG32_SOC15(GC, 0, mmVM_CONTEXT0_CNTL, tmp);
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> index 8b789f750b72..a9238735d361 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c
> @@ -166,6 +166,8 @@ static void gfxhub_v2_0_enable_system_domain(struct amdgpu_device *adev)
> tmp = RREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL);
> tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1);
> tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0);
> + tmp = REG_SET_FIELD(tmp, GCVM_CONTEXT0_CNTL,
> + RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
> WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_CNTL, tmp);
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> index b9d6c0bfa594..4c7e8c64a94e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> @@ -207,6 +207,8 @@ static void mmhub_v1_0_enable_system_domain(struct amdgpu_device *adev)
> tmp = RREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_CNTL);
> tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1);
> tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0);
> + tmp = REG_SET_FIELD(tmp, VM_CONTEXT0_CNTL,
> + RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
> WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_CNTL, tmp);
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> index 3542c203c3c8..86ed8cb915a8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
> @@ -152,6 +152,8 @@ static void mmhub_v2_0_enable_system_domain(struct amdgpu_device *adev)
> tmp = RREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_CNTL);
> tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1);
> tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0);
> + tmp = REG_SET_FIELD(tmp, MMVM_CONTEXT0_CNTL,
> + RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
> WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_CNTL, tmp);
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> index 0cf7ef44b4b5..657970f9ebfb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> @@ -240,6 +240,8 @@ static void mmhub_v9_4_enable_system_domain(struct amdgpu_device *adev,
> hubid * MMHUB_INSTANCE_REGISTER_OFFSET);
> tmp = REG_SET_FIELD(tmp, VML2VC0_VM_CONTEXT0_CNTL, ENABLE_CONTEXT, 1);
> tmp = REG_SET_FIELD(tmp, VML2VC0_VM_CONTEXT0_CNTL, PAGE_TABLE_DEPTH, 0);
> + tmp = REG_SET_FIELD(tmp, VML2VC0_VM_CONTEXT0_CNTL,
> + RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
> WREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT0_CNTL,
> hubid * MMHUB_INSTANCE_REGISTER_OFFSET, tmp);
> }
> --
> 2.17.1
>
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