[PATCH] Revert "drm/amdgpu/nbio7.4: add hw bug workaround for vega20"
Russell, Kent
Kent.Russell at amd.com
Tue Sep 10 19:59:33 UTC 2019
This reverts commit e01f2d41895102d824c6b8f5e011dd5e286d5e8b.
VG20 did not require this workaround, as the fix is in the VBIOS.
Leave VG10/12 workaround as some older shipped cards do not have the
VBIOS fix in place, and the kernel workaround is required in those
situations
Change-Id: I2d7c394ce9d205d97be6acfa5edc4635951fdadf
Signed-off-by: Kent Russell <kent.russell at amd.com>
---
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
index 2d171bf07ad5..dafd9b7d31d3 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
@@ -308,13 +308,7 @@ static void nbio_v7_4_detect_hw_virt(struct amdgpu_device *adev)
static void nbio_v7_4_init_registers(struct amdgpu_device *adev)
{
- uint32_t def, data;
-
- def = data = RREG32_PCIE(smnPCIE_CI_CNTL);
- data = REG_SET_FIELD(data, PCIE_CI_CNTL, CI_SLV_ORDERING_DIS, 1);
- if (def != data)
- WREG32_PCIE(smnPCIE_CI_CNTL, data);
}
static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device *adev)
--
2.17.1
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