[PATCH] drm/amd/display; Fix kernel doc warnings

[Kazlauskas, Nicholas]

On 2019-09-19 1:42 p.m., Harry Wentland wrote:
> We had a couple of missing definitions and formatting errors.
> 
> Signed-off-by: Harry Wentland <harry.wentland at amd.com>
> ---
>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 ++++++++++++++
>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 10 +++++++++-
>   2 files changed, 23 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 7d62b4e86386..928a87f89f31 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -261,6 +261,13 @@ static inline bool amdgpu_dm_vrr_active(struct dm_crtc_state *dm_state)
>   	       dm_state->freesync_config.state == VRR_STATE_ACTIVE_FIXED;
>   }
>   
> +/**
> + * dm_pflip_high_irq() - Handle pageflip interrupt
> + * @interrupt_params: ignored
> + *
> + * Handles the pageflip interrupt by notfying all interested parties

Should be "notifying".

With that fixed,

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas at amd.com>

> + * that the pageflip has been completed.
> + */
>   static void dm_pflip_high_irq(void *interrupt_params)
>   {
>   	struct amdgpu_crtc *amdgpu_crtc;
> @@ -405,6 +412,13 @@ static void dm_vupdate_high_irq(void *interrupt_params)
>   	}
>   }
>   
> +/**
> + * dm_crtc_high_irq() - Handles CRTC interrupt
> + * @interrupt_params: ignored
> + *
> + * Handles the CRTC/VSYNC interrupt by notfying DRM's VBLANK
> + * event handler.
> + */
>   static void dm_crtc_high_irq(void *interrupt_params)
>   {
>   	struct common_irq_params *irq_params = interrupt_params;
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> index 17a35b504552..af2025f3ac1a 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
> @@ -105,6 +105,12 @@ struct amdgpu_dm_backlight_caps {
>    * @display_indexes_num: Max number of display streams supported
>    * @irq_handler_list_table_lock: Synchronizes access to IRQ tables
>    * @backlight_dev: Backlight control device
> + * @backlight_link: Link on which to control backlight
> + * @backlight_caps: Capabilities of the backlight device
> + * @freesync_module: Module handling freesync calculations
> + * @fw_dmcu: Reference to DMCU firmware
> + * @dmcu_fw_version: Version of the DMCU firmware
> + * @soc_bounding_box: SOC bounding box values provided by gpu_info FW
>    * @cached_state: Caches device atomic state for suspend/resume
>    * @compressor: Frame buffer compression buffer. See &struct dm_comressor_info
>    */
> @@ -125,7 +131,7 @@ struct amdgpu_display_manager {
>   	u16 display_indexes_num;
>   
>   	/**
> -	 * @atomic_obj
> +	 * @atomic_obj:
>   	 *
>   	 * In combination with &dm_atomic_state it helps manage
>   	 * global atomic state that doesn't map cleanly into existing
> @@ -231,6 +237,8 @@ struct amdgpu_display_manager {
>   	uint32_t dmcu_fw_version;
>   #ifdef CONFIG_DRM_AMD_DC_DCN2_0
>   	/**
> +	 * @soc_bounding_box:
> +	 *
>   	 * gpu_info FW provided soc bounding box struct or 0 if not
>   	 * available in FW
>   	 */
>