[PATCH 11/21] drm/amdgpu: add common gfx_ras_fini function

[Zhou1, Tao]

> -----Original Message-----
> From: Chen, Guchun <Guchun.Chen at amd.com>
> Sent: 2019年9月19日 22:11
> To: Zhou1, Tao <Tao.Zhou1 at amd.com>; amd-gfx at lists.freedesktop.org;
> Zhang, Hawking <Hawking.Zhang at amd.com>
> Subject: RE: [PATCH 11/21] drm/amdgpu: add common gfx_ras_fini function
> 
> 
> -----Original Message-----
> From: Zhou1, Tao <Tao.Zhou1 at amd.com>
> Sent: Thursday, September 19, 2019 3:13 PM
> To: amd-gfx at lists.freedesktop.org; Chen, Guchun
> <Guchun.Chen at amd.com>; Zhang, Hawking <Hawking.Zhang at amd.com>
> Cc: Zhou1, Tao <Tao.Zhou1 at amd.com>
> Subject: [PATCH 11/21] drm/amdgpu: add common gfx_ras_fini function
> 
> gfx_ras_fini can be shared among all generations of gfx
> 
> Signed-off-by: Tao Zhou <tao.zhou1 at amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 15 +++++++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h |  1 +
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c   | 14 +-------------
>  3 files changed, 17 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index e7d87f717737..4f635f28eb34 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -651,3 +651,18 @@ int amdgpu_gfx_cp_ecc_error_irq(struct
> amdgpu_device *adev,
>  	amdgpu_ras_interrupt_dispatch(adev, &ih_data);
>  	return 0;
>  }
> +
> +void amdgpu_gfx_ras_fini(struct amdgpu_device *adev) {
> +	if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX) &&
> +			adev->gfx.ras_if) {
> +		struct ras_common_if *ras_if = adev->gfx.ras_if;
> +		struct ras_ih_if ih_info = {
> +			.head = *ras_if,
> +			.cb = amdgpu_gfx_process_ras_data_cb,
> [Guchun]I believe gfx ras cb has been specified in gfx ras init sequence. Then
> the cause set twice here is to ensure the interrupt removal can be done
> correctl?
[Tao] Yes, ih_info is not a global variable, the setting of cb is only to force ras_late_fini to execute ras_interrupt_remove_handler.

> +		};
> +
> +		amdgpu_ras_late_fini(adev, ras_if, &ih_info);
> +		kfree(ras_if);
> +	}
> +}
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> index 600599181620..8f2d137f4d20 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> @@ -391,4 +391,5 @@ int amdgpu_gfx_process_ras_data_cb(struct
> amdgpu_device *adev,  int amdgpu_gfx_cp_ecc_error_irq(struct
> amdgpu_device *adev,
>  				  struct amdgpu_irq_src *source,
>  				  struct amdgpu_iv_entry *entry);
> +void amdgpu_gfx_ras_fini(struct amdgpu_device *adev);
>  #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index 08b80157df3a..abdbd69394e6 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -2317,19 +2317,7 @@ static int gfx_v9_0_sw_fini(void *handle)
>  	int i;
>  	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> 
> -	if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__GFX) &&
> -			adev->gfx.ras_if) {
> -		struct ras_common_if *ras_if = adev->gfx.ras_if;
> -		struct ras_ih_if ih_info = {
> -			.head = *ras_if,
> -		};
> -
> -		amdgpu_ras_debugfs_remove(adev, ras_if);
> -		amdgpu_ras_sysfs_remove(adev, ras_if);
> -		amdgpu_ras_interrupt_remove_handler(adev,  &ih_info);
> -		amdgpu_ras_feature_enable(adev, ras_if, 0);
> -		kfree(ras_if);
> -	}
> +	amdgpu_gfx_ras_fini(adev);
> 
>  	for (i = 0; i < adev->gfx.num_gfx_rings; i++)
>  		amdgpu_ring_fini(&adev->gfx.gfx_ring[i]);
> --
> 2.17.1