[PATCH] drm/amdgpu: fix an UMC hw arbitrator bug

[Liu, Monk]

Okay, I can limit it only for vega10 adapter 

_____________________________________
Monk Liu|GPU Virtualization Team |AMD


-----Original Message-----
From: Zhang, Hawking <Hawking.Zhang at amd.com> 
Sent: Tuesday, September 24, 2019 1:44 PM
To: Liu, Monk <Monk.Liu at amd.com>; amd-gfx at lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu at amd.com>
Subject: RE: [PATCH] drm/amdgpu: fix an UMC hw arbitrator bug

The patch is in high risk to break other VG series and MI series. Any confidence this is a common hw bug across all UMC 6.x generations? 

Regards,
Hawking

-----Original Message-----
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> On Behalf Of Monk Liu
Sent: 2019年9月24日 11:39
To: amd-gfx at lists.freedesktop.org
Cc: Liu, Monk <Monk.Liu at amd.com>
Subject: [PATCH] drm/amdgpu: fix an UMC hw arbitrator bug

issue:
the UMC h/w bug is that when MCLK is doing the switch in the middle of a page access being preempted by high priority client (e.g. DISPLAY) then UMC and the mclk switch would stuck there due to deadlock

how:
fixed by disabling auto PreChg for UMC to avoid high priority client preempting other client's access on the same page, thus the deadlock could be avoided

Signed-off-by: Monk Liu <Monk.Liu at amd.com>
Change-Id: Iaf6eb2a20a4785ec8440e64d5e0cae67aa0603da
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 6102dea..8271b0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1306,6 +1306,24 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev)
 		 (unsigned)(adev->gmc.gart_size >> 20),
 		 (unsigned long long)amdgpu_bo_gpu_offset(adev->gart.bo));
 	adev->gart.ready = true;
+
+	/* disable auto Pchg is a w/a for the vega10 UMC hardware bug */
+	WREG32(0x5010c/4, 0x1002);
+	WREG32(0x5210c/4, 0x1002);
+	WREG32(0x5410c/4, 0x1002);
+	WREG32(0x5610c/4, 0x1002);
+	WREG32(0x15010c/4, 0x1002);
+	WREG32(0x15210c/4, 0x1002);
+	WREG32(0x15410c/4, 0x1002);
+	WREG32(0x15610c/4, 0x1002);
+	WREG32(0x25010c/4, 0x1002);
+	WREG32(0x25210c/4, 0x1002);
+	WREG32(0x25410c/4, 0x1002);
+	WREG32(0x25610c/4, 0x1002);
+	WREG32(0x35010c/4, 0x1002);
+	WREG32(0x35210c/4, 0x1002);
+	WREG32(0x35410c/4, 0x1002);
+	WREG32(0x35610c/4, 0x1002);
 	return 0;
 }
 
--
2.7.4

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