[PATCH] drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK for DPM states consist of three entities :FCLK, UCLK, MEMCLK all these three clk change together , MEMCLK from FCLK.

[Dai, Yuxian (David)]

[AMD Official Use Only - Internal Distribution Only]

On Tue, Mar 31, 2020 at 09:41:44AM -0400, Alex Deucher wrote:
> On Tue, Mar 31, 2020 at 6:10 AM Yuxian Dai <Yuxian.Dai at amd.com> wrote:
> >
> > From: "yuxiadai at amd.com" <yuxiadai at amd.com>
> 
> Your patch title is too long; it is basically the whole patch 
> description rather than just a title.  Please split it up between the 
> title and descriptions.  E.g.,
> 
> drm/amdgpu/powerplay: fix MCLK DPM handling for renoir
> 
> Using the FCLK DPM table to set the MCLK for DPM states consist of 
> three entities:
> FCLK
> UCLK
> MEMCLK
> All these three clk change together, MEMCLK from FCLK, so use the fclk 
> frequency.
> 
> With that fixed, patch is:
> Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> 

Yes, and usually, we don't leave the commit message as empty. David, you need describe the detailed info in the commit not the title.
 > missing  a blank line, so the description  confuse you . I will update it according your suggestion.
Thanks,
Ray

> >
> > Change-Id: Ia45f3069fc7ae56db495cb5a3865e2c50c550774
> > Signed-off-by: Yuxian Dai <Yuxian.Dai at amd.com>
> > ---
> >  drivers/gpu/drm/amd/powerplay/renoir_ppt.h | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.h 
> > b/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
> > index 2a390ddd37dd..89cd6da118a3 100644
> > --- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
> > +++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
> > @@ -37,7 +37,7 @@ extern void renoir_set_ppt_funcs(struct smu_context *smu);
> >                         freq = table->SocClocks[dpm_level].Freq;        \
> >                         break;                                          \
> >                 case SMU_MCLK:                                          \
> > -                       freq = table->MemClocks[dpm_level].Freq;        \
> > +                       freq = table->FClocks[dpm_level].Freq;  \
> >                         break;                                          \
> >                 case SMU_DCEFCLK:                                       \
> >                         freq = table->DcfClocks[dpm_level].Freq;        \
> > --
> > 2.17.1
> >
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