[PATCH] drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK
Wang, Kevin(Yang)
Kevin1.Wang at amd.com
Wed Apr 1 06:40:58 UTC 2020
[AMD Official Use Only - Internal Distribution Only]
________________________________
From: amd-gfx <amd-gfx-bounces at lists.freedesktop.org> on behalf of Yuxian Dai <Yuxian.Dai at amd.com>
Sent: Wednesday, April 1, 2020 2:02 PM
To: amd-gfx at lists.freedesktop.org <amd-gfx at lists.freedesktop.org>
Cc: Dai, Yuxian (David) <Yuxian.Dai at amd.com>; Dai, Yuxian (David) <Yuxian.Dai at amd.com>
Subject: [PATCH] drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK
From: "yuxiadai at amd.com" <yuxiadai at amd.com>
1,Using the FCLK DPM table to set the MCLK for DPM states consist of
three entities:
FCLK
UCLK
MEMCLK
All these three clk change together, MEMCLK from FCLK, so use the fclk
frequency.
2,we should show the current working clock freqency from clock table metric
Change-Id: Ia45f3069fc7ae56db495cb5a3865e2c50c550774
Signed-off-by: Yuxian Dai <Yuxian.Dai at amd.com>
---
drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 8 ++++++++
drivers/gpu/drm/amd/powerplay/renoir_ppt.h | 2 +-
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index 7bf52ecba01d..5c5d3f974532 100644
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -239,6 +239,7 @@ static int renoir_print_clk_levels(struct smu_context *smu,
uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0;
DpmClocks_t *clk_table = smu->smu_table.clocks_table;
SmuMetrics_t metrics;
+ bool cur_value_match_level = false;
if (!clk_table || clk_type >= SMU_CLK_COUNT)
return -EINVAL;
@@ -297,6 +298,13 @@ static int renoir_print_clk_levels(struct smu_context *smu,
GET_DPM_CUR_FREQ(clk_table, clk_type, i, value);
size += sprintf(buf + size, "%d: %uMhz %s\n", i, value,
cur_value == value ? "*" : "");
+ if(cur_value == value) {
+ cur_value_match_level = true;
+ }
+ }
+
+ if(!cur_value_match_level) {
+ size += sprintf(buf + size, " %uMhz *\n",cur_value);
}
[kevin]:
I have a little suggestion about coding style.
"Do not unnecessarily use braces where a single statement will do."
we'd better fix it.
thanks.
https://www.kernel.org/doc/html/latest/process/coding-style.html
Linux kernel coding style — The Linux Kernel documentation<https://www.kernel.org/doc/html/latest/process/coding-style.html>
Linux kernel coding style¶. This is a short document describing the preferred coding style for the linux kernel. Coding style is very personal, and I won’t force my views on anybody, but this is what goes for anything that I have to be able to maintain, and I’d prefer it for most other things too. Please at least consider the points made here.
www.kernel.org
return size;
diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.h b/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
index 2a390ddd37dd..89cd6da118a3 100644
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.h
@@ -37,7 +37,7 @@ extern void renoir_set_ppt_funcs(struct smu_context *smu);
freq = table->SocClocks[dpm_level].Freq; \
break; \
case SMU_MCLK: \
- freq = table->MemClocks[dpm_level].Freq; \
+ freq = table->FClocks[dpm_level].Freq; \
break; \
case SMU_DCEFCLK: \
freq = table->DcfClocks[dpm_level].Freq; \
--
2.17.1
_______________________________________________
amd-gfx mailing list
amd-gfx at lists.freedesktop.org
https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7CKevin1.Wang%40amd.com%7Cac64217a79c44e06267008d7d602484e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637213177638342283&sdata=iEt1JzC0wcb7rQ%2F2TWBu7RfJGrChPpt%2Fc2jXPfqjruU%3D&reserved=0
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/amd-gfx/attachments/20200401/6ee80a88/attachment-0001.htm>
More information about the amd-gfx
mailing list