[Intel-gfx] [PATCH 4/5] drm/amdgpu: utilize subconnector property for DP through atombios
Jani Nikula
jani.nikula at intel.com
Wed Apr 15 10:04:53 UTC 2020
Alex, Harry, Christian, can you please eyeball this series and see if it
makes sense for you?
Thanks,
Jani.
On Tue, 07 Apr 2020, Jeevan B <jeevan.b at intel.com> wrote:
> From: Oleg Vasilev <oleg.vasilev at intel.com>
>
> Since DP-specific information is stored in driver's structures, every
> driver needs to implement subconnector property by itself.
>
> v2: rebase
>
> Cc: Alex Deucher <alexander.deucher at amd.com>
> Cc: Christian König <christian.koenig at amd.com>
> Cc: David (ChunMing) Zhou <David1.Zhou at amd.com>
> Cc: amd-gfx at lists.freedesktop.org
> Signed-off-by: Jeevan B <jeevan.b at intel.com>
> Signed-off-by: Oleg Vasilev <oleg.vasilev at intel.com>
> Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
> Link: https://patchwork.freedesktop.org/patch/msgid/20190829114854.1539-6-oleg.vasilev@intel.com
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 10 ++++++++++
> drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 1 +
> drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 18 +++++++++++++++++-
> 3 files changed, 28 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> index f355d9a..71aade0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c
> @@ -26,6 +26,7 @@
>
> #include <drm/drm_edid.h>
> #include <drm/drm_fb_helper.h>
> +#include <drm/drm_dp_helper.h>
> #include <drm/drm_probe_helper.h>
> #include <drm/amdgpu_drm.h>
> #include "amdgpu.h"
> @@ -1405,6 +1406,10 @@ amdgpu_connector_dp_detect(struct drm_connector *connector, bool force)
> pm_runtime_put_autosuspend(connector->dev->dev);
> }
>
> + drm_dp_set_subconnector_property(&amdgpu_connector->base,
> + ret,
> + amdgpu_dig_connector->dpcd,
> + amdgpu_dig_connector->downstream_ports);
> return ret;
> }
>
> @@ -1951,6 +1956,11 @@ amdgpu_connector_add(struct amdgpu_device *adev,
> if (has_aux)
> amdgpu_atombios_dp_aux_init(amdgpu_connector);
>
> + if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
> + connector_type == DRM_MODE_CONNECTOR_eDP) {
> + drm_mode_add_dp_subconnector_property(&amdgpu_connector->base);
> + }
> +
> return;
>
> failed:
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> index 37ba07e..04a430e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> @@ -469,6 +469,7 @@ struct amdgpu_encoder {
> struct amdgpu_connector_atom_dig {
> /* displayport */
> u8 dpcd[DP_RECEIVER_CAP_SIZE];
> + u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
> u8 dp_sink_type;
> int dp_clock;
> int dp_lane_count;
> diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> index 9b74cfd..900b272 100644
> --- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> @@ -328,6 +328,22 @@ static void amdgpu_atombios_dp_probe_oui(struct amdgpu_connector *amdgpu_connect
> buf[0], buf[1], buf[2]);
> }
>
> +static void amdgpu_atombios_dp_ds_ports(struct amdgpu_connector *amdgpu_connector)
> +{
> + struct amdgpu_connector_atom_dig *dig_connector = amdgpu_connector->con_priv;
> + int ret;
> +
> + if (dig_connector->dpcd[DP_DPCD_REV] > 0x10) {
> + ret = drm_dp_dpcd_read(&amdgpu_connector->ddc_bus->aux,
> + DP_DOWNSTREAM_PORT_0,
> + dig_connector->downstream_ports,
> + DP_MAX_DOWNSTREAM_PORTS);
> + if (ret)
> + memset(dig_connector->downstream_ports, 0,
> + DP_MAX_DOWNSTREAM_PORTS);
> + }
> +}
> +
> int amdgpu_atombios_dp_get_dpcd(struct amdgpu_connector *amdgpu_connector)
> {
> struct amdgpu_connector_atom_dig *dig_connector = amdgpu_connector->con_priv;
> @@ -343,7 +359,7 @@ int amdgpu_atombios_dp_get_dpcd(struct amdgpu_connector *amdgpu_connector)
> dig_connector->dpcd);
>
> amdgpu_atombios_dp_probe_oui(amdgpu_connector);
> -
> + amdgpu_atombios_dp_ds_ports(amdgpu_connector);
> return 0;
> }
--
Jani Nikula, Intel Open Source Graphics Center
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