[PATCH] drm/amdgpu/vcn2.5: wait for tiles off after unpause
Leo Liu
leo.liu at amd.com
Tue Apr 28 14:04:09 UTC 2020
Reviewed-by: Leo Liu <leo.liu at amd.com>
On 2020-04-27 4:05 p.m., James Zhu wrote:
> Wait for tiles off after unpause to fix transcode timeout issue.
> It is a work around.
>
> Signed-off-by: James Zhu <James.Zhu at amd.com>
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> index 0fa1c5c..38ca4a7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
> @@ -1404,7 +1404,7 @@ static int vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev,
> {
> struct amdgpu_ring *ring;
> uint32_t reg_data = 0;
> - int ret_code;
> + int ret_code = 0;
>
> /* pause/unpause if state is changed */
> if (adev->vcn.inst[inst_idx].pause_state.fw_based != new_state->fw_based) {
> @@ -1414,7 +1414,6 @@ static int vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev,
> (~UVD_DPG_PAUSE__NJ_PAUSE_DPG_ACK_MASK);
>
> if (new_state->fw_based == VCN_DPG_STATE__PAUSE) {
> - ret_code = 0;
> SOC15_WAIT_ON_RREG(UVD, inst_idx, mmUVD_POWER_STATUS, 0x1,
> UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code);
>
> @@ -1469,9 +1468,10 @@ static int vcn_v2_5_pause_dpg_mode(struct amdgpu_device *adev,
> UVD_PGFSM_CONFIG__UVDM_UVDU_PWR_ON, UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code);
> }
> } else {
> - /* unpause dpg, no need to wait */
> reg_data &= ~UVD_DPG_PAUSE__NJ_PAUSE_DPG_REQ_MASK;
> WREG32_SOC15(UVD, inst_idx, mmUVD_DPG_PAUSE, reg_data);
> + SOC15_WAIT_ON_RREG(UVD, inst_idx, mmUVD_POWER_STATUS, 0x1,
> + UVD_POWER_STATUS__UVD_POWER_STATUS_MASK, ret_code);
> }
> adev->vcn.inst[inst_idx].pause_state.fw_based = new_state->fw_based;
> }
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